Fault Simulation and test generation Flashcards
What is the purpose of fault simulation?
What are the applications?
To detect the effect of a fault in a faulty circuit.
- Determine fault coverage of a test set.(fault grading)
- Identification of non detectable faults
- Test compaction(identify redundant test patterns)
- Fault diagnosis
- Reliability analysis.
Explain Fault grading…
a test set (set of test patterns) is applied to a circuit under test (CUT) in fault simulation and is evaluated with
respect to all faults considered under the current fault model. The fault coverage of a test set is the percentage of faults detectable by at least one test pattern.
For faults that are not detected by a given test set, an ATPG tool can generate a test pattern or determine that a fault is undetectable.
Fault Diagnosis
Fault simulation is used to create a fault dictionary.
The dictionary maps circuit responses to a set of faults that cause the responses. to locate a fault, the response of the CUT to a test vector can be looked up in the dictionary.
Fault simulation…
Is used to study the effects of a fault in a faulty circuit and to decide on appropriate countermeasures.
Resilience and fault tolerance techniques can be validated by using fault simulation.
Explain the steps of the Plain Fault simulation algorithm.
For each pattern
calculate result for the fault free circuit
For each failure
generate new faulty netlist
simulation
compare outputs
end
Computationally costlyParallel Fault Simulation
???
Explain Deductive Fault Simulation
Identify all faults that can be detected by a pattern in a single pass of fault free simulation.
It stores at each node a list of faults that are detected at that node. At the end the fault list at a primary output contain all faults detected by the pattern.
Example:
An and gate d = a.b.c
With input pattern 011
The faults observed at node d are: d stuck at 1 U all faults observed at node a (but not b and c).
Disadvantages of deductive fault simulation.
Not able to handle unknown values.
All nodes have to be simulated, even though not every node is affected by every fault.
Explain concurrent fault simulation…
Faults only affect gates in its transitive fan-out cone.
Lists of faults are stored at the gates, however, augmented with the state of the gate’s inputs and outputs in presence of the fault.(????)
It is an event driven simulation.
Parallel Pattern Single Fault Propagation(PPSFP)
- Only a single fault is simulated, for w parallel patterns.
- First the response for the faulty free circuit is evaluated for the w patterns.
- Faulty circuit responses are evaluated, one at a time.
How does observability of internal nodes help PPSFP.
Logic simulation can be confined to regions through which faults can actually propagate.
Structural testing…
systematically searches for test patterns based on the circuit structure.
How can the test generation problem be conceptually described (combinational atpg problem)?
find the set of input values such that the output of the xor is a 1.
Advantages and disadvantages of random test generation.
Simple to implement (built in test circuits using lfsr)
Some circuits have random pattern resistant faults which leads to low fault coverage.
Input probability can be biased to target random pattern resistant faults.
Pseudo exhaustive testing…
If the number of inputs is large, exhaustive testing is prohibitive.
Pseudo exhaustive partition circuit into input cones to outputs.
Apply exhaustive testing only to each cone.
Still detect every detectable fault.
