ECM 1413 Multiprocessors Flashcards

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1
Q

Improve performance by performing multiple computations in parallel. The 5 outlets for which this can be achieved

A

ILP - Pipelining
Threads
Multi-core processors
Multiprocessors
Multicomputers

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2
Q

clock speeds cannot be increased indefinitely because

A

Due to physical and thermal limitations

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3
Q

Flynn’s Taxonomy

A

A classification of computer architectures based on number of instruction and data streams they can handle simultaneously

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4
Q

Flynn’s Taxonomy instruction stream(s)

A
  • An instruction stream - sequence of instructions; arithmetic, data transfer, and branching
    ○ PC - next instruction
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5
Q

Flynn’s Taxonomy data stream

A
  • A data stream consists of operands (constants, variables, and memory addresses)
    ○ Registers
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6
Q

The four possible combinations of data and instruction streams

A

SISD
SIMD
MISD
MIMD

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7
Q

Single Instruction Single Data (SISD)

A

Sequential computer with no data or instruction parallelism
Older single-core CPUs & simple microcontrollers

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8
Q

Multiple Instruction, Single Data (MISD)

A
  • Multiple instructions operate on one piece of data simultaneously
  • Used for fault tolerance
  • Rare in practice
  • Example: Space shuttle flight control systems
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9
Q

Example of MISD

A

Example - Triple Modular Redundancy
* A majority vote of three independent systems or processors
* Space satellite systems often use TMR

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10
Q

Single Instruction, Multiple Data (SIMD)

A

Execute the same instruction on multiple data points simultaneously

SIMD computers are good for vector operations, including image and audio processing.
SIMD computers are not suitable when the type of instruction depends on the data.

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11
Q

SIMD example

A

Graphics Processing Units
* A GPU contain many ALUs to perform mathematical operations in parallel.
* A GPU is based on SIMD architecture.

  • In comparison to CPUs:
    • GPUs have more ALUs and rely less on cache.
    • GPUs have a high throughput and higher latency.
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12
Q

GPUs and Threads

A
  • GPUs hide latency by utilising threads
  • A process may be subdivided into multiple threads
  • Threads within a process share data, heap, and code, but have their own registers and stack
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13
Q

Multiple Instruction, Multiple Data (MIMD)

A

Multiple processors simultaneously execute different instructions on different pieces of data.

A multi-core processor puts many CPU cores on one chip

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14
Q

MIMD Example

A

Example - EPYC 7763 Processor
The AMD EPYC 7763 processor has:
* 64 cores/128 threads
* 64 × 32 KB 8-way set associative L1 instruction cache
* 64 × 32 KB 8-way set associative L1 data cache
* 64 × 512 KB 8-way set associative L2 cache
* 256 MB of L3 cache for each group of four cores

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15
Q

Multiprocessors

A
  • Two or more CPUs within a single computer system
  • CPUs communicate through shared memory variables.
  • To modify a shared variable, the CPU locks the variable so that no other processor can modify it.

Shared memory

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16
Q

Multiprocessor example

A

Dell PowerEdge R7525 Rack Server:
* 2 × AMD EPYC processors
* 2 TB memory
* 4 TB SSD

17
Q

Multi-Computers

A
  • Different computers connected together
  • A standard rackmount has can house multiple Dell PowerEdge R7525 Rack Servers.

Distributed memory

18
Q

Shared vs Distributed Memory

A

Shared (Multiprocessors)
- Processors communicate through the shared memory
- Faster communication

Distributed (Multicomputers)
- Processors communicate by passing messages
- Allows for higher bandwidth