COMBINATIONAL LOGIC Flashcards
Describe the different types of logic circuits in digital systems
- Combinational
Consists of input variables, logic gates, and output variables.
Outputs at any time determined from only the present
combination of inputs. - Sequential
Employ storage elements in addition to logic gates.
Outputs are a function of present inputs, past inputs,
They are the building blocks of digital systems
Illustrate the block diagram of a combinational circuit and sequential circuits
The diagram of a combinational circuit has logic gates
with no feedback paths or memory elements .
*See notes page 4 for the illustrations
Describe what a functional block is and give examples
Fundamental circuits that are the base building blocks of most larger digital circuits
They are reusable and are common to many systems.
Examples of functional logic circuits
-Decoders
-Encoders
-Code converters
-Multiplexers
Describe where the following functional blocks are used: Multiplexers, Decoders and encoders
Multiplexers
- Selectors for routing data to the processor, memory, I/O
- Multiplexers route the data to the correct bus or port.
Decoders
- Used for selecting things like a bank of memory and then the address within the bank.
- This is also the function needed to ‘decode’ the instruction to determine the operation to perform.
Encoders
- Used in various components such as keyboards.
-Telecommunications and networking for data transfer
What are the steps needed to obtain the output boolean functions from a logic diagram
- Label all gate outputs that are a function of input variables with arbitrary symbols. Determine the Boolean functions for each gate output.
- Label the gates that are a function of input variables and previously labeled gates with other arbitrary symbols. Find the Boolean functions for these gates.
- Repeat the step 2 until the outputs of the circuit are obtained.
- By repeated substitution of previously defined functions, obtain the output Boolean functions in terms of input variables.
*Do example on page 8-10
Detail the steps of the design procedure
i. Specifications: determine the required number of inputs and outputs and assign a symbol to each.
ii. Formulation:
i. Derive the truth table that defines the required relationship between inputs and outputs.
ii. Obtain the simplified Boolean functions for each output as a function of the input variables.
iii. Optimization: Draw the logic diagram and verify the correctness of the design (manually or by simulation).
iv. Technology Mapping: Map the logic diagram to the
implementation technology selected
v. Evaluation: Evaluate the timing and power
Describe the conversion circuit under the specification and formulation steps
A conversion circuit – Inserted between the two systems each using different codes for the same information.
Makes the two systems compatible
For Example: BCD to Excess-3 code converter
BCD code words for digits 0 through 9: 4-bit patterns
0000 to 1001, respectively
Excess-3 code words for digits 0 through 9: 4-bit patterns consisting of 3 (binary 0011) added to each BCD code word
Give an example of the optimization and mapping process
*See page 13 and 14
Describe a half adder and draw its truth table
A combinational circuit that performs the addition of
two bits is called a half adder.
*See notes for truth table
Draw logic gate circuits that implement the half adder
*See PAGE 18
Describe a full adder and draw its truth table
A combinational circuit that performs the addition of three bits(two significant bits and a previous carry) is a full adder.
It has three inputs and two outputs, whereas half adder has only two inputs and two outputs.
The first two inputs are A and B and the third input is an input carry as C-IN.
*See notes for the truth table (20)
Illustrate how a full adder can be implemented in SOP
See page 22
Illustrate the carry look ahead implementation of the full-adder
Full-adder can also implemented with two half adders and one OR gate (Carry Look-Ahead adder).
*See page 23
Describe and illustrate the use of the binary adder
-In a computer, for a multi-bit operation, each bit must be represented by a full adder and must be added
simultaneously. Eg To add two 8-bit numbers, you will need 8 full adders which can be formed by cascading two of the 4-bit blocks.
-The binary adder a called Ripple Carry Adder, because
of the construction with full adders are connected in cascade.
*See notes for illustration- page 27
Describe the issue presented by carry propagation
Because the propagation delay will affect the output signals on different time, signals need to be given enough time to get the precise and stable outputs.
For an n -bit adder, there are 2n gate levels for the carry to propagate from input to output.
Since all other arithmetic operations are implemented by successive additions, the time consumed during the addition process is critical.
What are some possible solutions to the problem presented by carry propagation
Use faster gates with reduced delays. However, physical circuits have a limit to their capability.
Increase the complexity of the equipment in such a way that the carry delay time is reduced.
The most widely used technique employs the principle of carry look-ahead to improve the speed of the algorithm.
Illustrate the use of carry look ahead to reduce carry propagation
*See page 30
What is a minuend and what is a subtrahend
The number from which other number is to be deducted
is called as minuend and the number subtracted from
the minuend is called subtrahend.
Illustrate and draw the truth table for a half subtractor
*See page 34
Describe and illustrate a full subtractor and draw its truth table
It has three input terminals in which two terminals
corresponds to the two bits to be subtracted (minuend A and subtrahend B), and a borrow bit Bi corresponds to the borrow operation.
There are two outputs, one corresponds to the difference D output and other borrow output Bo
*See page 35
Illustrate the different ways in which a parallel subtractor can be implemented
*See page 38
Illustrate the parallel adder/subtractor
See page 39 for picture
List some applications of the full subtractor
Employed for ALU (Arithmetic logic unit) in computers to subtract at CPU & GPU for the applications of graphics to decrease the circuit difficulty.
Performing arithmetical functions like subtraction, in electronic calculators as well as digital devices.
Applicable for different microcontrollers for arithmetic subtraction, timers, and program counter (PC)
Used in processors to compute tables, address, etc.
It is also useful for DSP and networking based systems.
Describe overflow as a problem in digital computers discussing it on signed and unsigned numbers. Give an example
Overflow is a problem in digital computers because the number of bits that hold the number is finite and a result
that contains n+1 bits cannot be accommodated.
When two unsigned numbers are added:
-An overflow is detected from the end carry out of the MSB position.
When two signed numbers are added,
-The leftmost bit always represents the sign
-The sign bit is treated as part of the number and the end carry does not indicate an overflow.
An overflow cannot occur after an addition if one number is positive and the other is negative.
An overflow may occur if the two numbers added are both positive or both negative.
*Do example on page 43
Describe the magnitude comparator
A magnitude comparator is a combinational circuit that compares two numbers A and B and determines their relative magnitudes.
The outcome of the comparison is specified by three binary variables that indicate whether
A > B
A = B
A < B
Describe what a decoder is and give an example of the same
A decoder is a combinational circuit that converts binary
information from n input lines to a maximum of 2 n unique output lines.
The decoder is called n-to-m-line decoder, where m≤2^n
For example, an inverter ( NOT-gate ) can be classed as a 1-to-2 binary decoder as 1-input and 2-outputs (2
1 ) is possible because with an input A it can produce two outputs A and A’ (not-A) as shown.
Illustrate the circuit diagrams and truth tables of the line decoder and the 2-to-4 binary decoder
*See notes page 54 and 55
Describe the 3-to-8 line decoder and draw its input output tables
For each possible input combination, there are seven outputs that are equal to 0 and only one that is equal to
1. The output whose value is equal to 1 represents the
minterm equivalent of the binary number currently
available in the input lines.
*See notes page 56
Why are some decoders constructed with NAND gates
More economical to generate the decoder minterms in their complemented form.
Results in an active-“LOW” output while the rest will be “HIGH”. As indicated by the truth table, only one output can be equal to 0 at any given time, all other outputs are equal to 1
*See page 57
What is the use of an enable pin. Illustrate using a truth table
The enable pins are used to switch ON the output pins.
*See page 57
