COMBINATIONAL LOGIC Flashcards

1
Q

Describe the different types of logic circuits in digital systems

A
  1. Combinational
     Consists of input variables, logic gates, and output variables.
     Outputs at any time determined from only the present
    combination of inputs.
  2. Sequential
     Employ storage elements in addition to logic gates.
     Outputs are a function of present inputs, past inputs,
     They are the building blocks of digital systems
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2
Q

Illustrate the block diagram of a combinational circuit and sequential circuits

A

The diagram of a combinational circuit has logic gates
with no feedback paths or memory elements .
*See notes page 4 for the illustrations

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3
Q

Describe what a functional block is and give examples

A

 Fundamental circuits that are the base building blocks of most larger digital circuits
 They are reusable and are common to many systems.
 Examples of functional logic circuits
-Decoders
-Encoders
-Code converters
-Multiplexers

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4
Q

Describe where the following functional blocks are used: Multiplexers, Decoders and encoders

A

 Multiplexers
- Selectors for routing data to the processor, memory, I/O
- Multiplexers route the data to the correct bus or port.

 Decoders
- Used for selecting things like a bank of memory and then the address within the bank.
- This is also the function needed to ‘decode’ the instruction to determine the operation to perform.

 Encoders
- Used in various components such as keyboards.
-Telecommunications and networking for data transfer

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5
Q

What are the steps needed to obtain the output boolean functions from a logic diagram

A
  1. Label all gate outputs that are a function of input variables with arbitrary symbols. Determine the Boolean functions for each gate output.
  2. Label the gates that are a function of input variables and previously labeled gates with other arbitrary symbols. Find the Boolean functions for these gates.
  3. Repeat the step 2 until the outputs of the circuit are obtained.
  4. By repeated substitution of previously defined functions, obtain the output Boolean functions in terms of input variables.

*Do example on page 8-10

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6
Q

Detail the steps of the design procedure

A

i. Specifications: determine the required number of inputs and outputs and assign a symbol to each.
ii. Formulation:
i. Derive the truth table that defines the required relationship between inputs and outputs.
ii. Obtain the simplified Boolean functions for each output as a function of the input variables.

iii. Optimization: Draw the logic diagram and verify the correctness of the design (manually or by simulation).
iv. Technology Mapping: Map the logic diagram to the
implementation technology selected
v. Evaluation: Evaluate the timing and power

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7
Q

Describe the conversion circuit under the specification and formulation steps

A

 A conversion circuit – Inserted between the two systems each using different codes for the same information.
 Makes the two systems compatible

For Example: BCD to Excess-3 code converter
 BCD code words for digits 0 through 9: 4-bit patterns
0000 to 1001, respectively
 Excess-3 code words for digits 0 through 9: 4-bit patterns consisting of 3 (binary 0011) added to each BCD code word

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8
Q

Give an example of the optimization and mapping process

A

*See page 13 and 14

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9
Q

Describe a half adder and draw its truth table

A

A combinational circuit that performs the addition of
two bits is called a half adder.

*See notes for truth table

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10
Q

Draw logic gate circuits that implement the half adder

A

*See PAGE 18

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11
Q

Describe a full adder and draw its truth table

A

 A combinational circuit that performs the addition of three bits(two significant bits and a previous carry) is a full adder.

 It has three inputs and two outputs, whereas half adder has only two inputs and two outputs.

 The first two inputs are A and B and the third input is an input carry as C-IN.

*See notes for the truth table (20)

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12
Q

Illustrate how a full adder can be implemented in SOP

A

See page 22

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13
Q

Illustrate the carry look ahead implementation of the full-adder

A

Full-adder can also implemented with two half adders and one OR gate (Carry Look-Ahead adder).

*See page 23

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14
Q

Describe and illustrate the use of the binary adder

A

-In a computer, for a multi-bit operation, each bit must be represented by a full adder and must be added
simultaneously. Eg To add two 8-bit numbers, you will need 8 full adders which can be formed by cascading two of the 4-bit blocks.
-The binary adder a called Ripple Carry Adder, because
of the construction with full adders are connected in cascade.

*See notes for illustration- page 27

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15
Q

Describe the issue presented by carry propagation

A

 Because the propagation delay will affect the output signals on different time, signals need to be given enough time to get the precise and stable outputs.
 For an n -bit adder, there are 2n gate levels for the carry to propagate from input to output.
 Since all other arithmetic operations are implemented by successive additions, the time consumed during the addition process is critical.

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16
Q

What are some possible solutions to the problem presented by carry propagation

A

 Use faster gates with reduced delays. However, physical circuits have a limit to their capability.
 Increase the complexity of the equipment in such a way that the carry delay time is reduced.
 The most widely used technique employs the principle of carry look-ahead to improve the speed of the algorithm.

17
Q

Illustrate the use of carry look ahead to reduce carry propagation

A

*See page 30

18
Q

What is a minuend and what is a subtrahend

A

The number from which other number is to be deducted
is called as minuend and the number subtracted from
the minuend is called subtrahend.

19
Q

Illustrate and draw the truth table for a half subtractor

A

*See page 34

20
Q

Describe and illustrate a full subtractor and draw its truth table

A

 It has three input terminals in which two terminals
corresponds to the two bits to be subtracted (minuend A and subtrahend B), and a borrow bit Bi corresponds to the borrow operation.
 There are two outputs, one corresponds to the difference D output and other borrow output Bo

*See page 35

21
Q

Illustrate the different ways in which a parallel subtractor can be implemented

A

*See page 38

22
Q

Illustrate the parallel adder/subtractor

A

See page 39 for picture

23
Q

List some applications of the full subtractor

A

 Employed for ALU (Arithmetic logic unit) in computers to subtract at CPU & GPU for the applications of graphics to decrease the circuit difficulty.

 Performing arithmetical functions like subtraction, in electronic calculators as well as digital devices.

 Applicable for different microcontrollers for arithmetic subtraction, timers, and program counter (PC)

 Used in processors to compute tables, address, etc.

 It is also useful for DSP and networking based systems.

24
Q

Describe overflow as a problem in digital computers discussing it on signed and unsigned numbers. Give an example

A

Overflow is a problem in digital computers because the number of bits that hold the number is finite and a result
that contains n+1 bits cannot be accommodated.

 When two unsigned numbers are added:
-An overflow is detected from the end carry out of the MSB position.

 When two signed numbers are added,
-The leftmost bit always represents the sign
-The sign bit is treated as part of the number and the end carry does not indicate an overflow.

 An overflow cannot occur after an addition if one number is positive and the other is negative.
 An overflow may occur if the two numbers added are both positive or both negative.

*Do example on page 43

25
Q

Describe the magnitude comparator

A

 A magnitude comparator is a combinational circuit that compares two numbers A and B and determines their relative magnitudes.
 The outcome of the comparison is specified by three binary variables that indicate whether

A > B
A = B
A < B

26
Q

Describe what a decoder is and give an example of the same

A

A decoder is a combinational circuit that converts binary
information from n input lines to a maximum of 2 n unique output lines.

 The decoder is called n-to-m-line decoder, where m≤2^n

 For example, an inverter ( NOT-gate ) can be classed as a 1-to-2 binary decoder as 1-input and 2-outputs (2
1 ) is possible because with an input A it can produce two outputs A and A’ (not-A) as shown.

27
Q

Illustrate the circuit diagrams and truth tables of the line decoder and the 2-to-4 binary decoder

A

*See notes page 54 and 55

28
Q

Describe the 3-to-8 line decoder and draw its input output tables

A

For each possible input combination, there are seven outputs that are equal to 0 and only one that is equal to
1. The output whose value is equal to 1 represents the
minterm equivalent of the binary number currently
available in the input lines.

*See notes page 56

29
Q

Why are some decoders constructed with NAND gates

A

 More economical to generate the decoder minterms in their complemented form.
 Results in an active-“LOW” output while the rest will be “HIGH”. As indicated by the truth table, only one output can be equal to 0 at any given time, all other outputs are equal to 1

*See page 57

29
Q

What is the use of an enable pin. Illustrate using a truth table

A

The enable pins are used to switch ON the output pins.
*See page 57