CMOS Flashcards
CMOS
complementary metal-oxide
semiconductor
is the semiconductor technology used in the transistors that are manufactured into most of today’s computer microchips
CMOS
It’s a technology used in the fabrication of integrated circuits (ICs), particularly for digital logic circuits and microprocessors.
CMOS
In ________ technology, both kinds of transistors are used in a complementary way to form a ____________ that forms an effective means of __________
CMOS, current gate, electrical control
PMOS
P-channel Metal-Oxide-Semiconductor
NMOS
N-channel Metal-Oxide-Semiconductor
CMOS technology utilizes both ________ and ________ transistors on the same chip.
PMOS and NMOS
These transistors are configured in a complementary manner, meaning that one type of transistor is used for the high voltage state (logic 1) and the other type for the low voltage state (logic 0).
PMOS and NMOS
The complementary arrangement allows CMOS circuits to have __________power consumption because power is only consumed during transitions between ____________, minimizing ____________ dissipation
very low, logic states, static power
The main advantage of CMOS over NMOS and BIPOLAR technology is the much _______power dissipation
smaller
Unlike NMOS or BIPOLAR circuits, a “Complementary MOS circuit” has almost ____________power dissipation
no static
________ is only dissipated in case the circuit actually switches. This allows the integration of more CMOS gates on an IC than in NMOS or bipolar technology, resulting in much better performance.
Power
________________ consists of P-channel MOS (PMOS) and N-channel MOS (NMOS).
CMOS transistor
low power consumption, high noise immunity, and scalability to smaller feature sizes, which allows for increased integration density and improved performance
CMOS technology
is built on a p-type substrate with n-type source and drain diffused on it. The majority of carriers are electrons.
NMOS
When a high voltage is applied to the gate, the ________ will conduct
NMOS
when a low voltage is applied to the gate, NMOS will __________
not conduct
considered to be faster than PMOS, since the carriers in this, which are electrons, travel twice as fast as the holes
NMOS
consists of P-type Source and Drain diffused on an N-type substrate.
PMOS
The majority of carriers are holes. When a high voltage is applied to the gate, the PMOS will ____________. When a low
voltage is applied to the gate, the PMOS ____________.
not conduct, will conduct
The ________ devices are more immune to noise than NMOS devices
PMOS
In CMOS technology, both N-type and P type transistors are used to design _________________
CMOS Working Principle
logic functions
The same signal which turns ON a transistor of one type is used to ____________ a transistor of the other type
CMOS Working Principle: This characteristic allows the design of logic devices using only simple switches, without the need for a pull-up resistor
turn OFF
MOS transistors are electrically __________________
CMOS Working Principle
controlled switches
Voltage at gate controls path from ________________
CMOS Working Principle
source to drain
Complementary CMOS logic gates (3)
CMOS Working Principle
- NMOS pull-down network
- PMOS pull-up network
- static CMOS
nMOS: 1 = ____
PMOS: 0 = ____
CMOS Working Principle
ON
Series: ________ must be ON
Parallel: ________ can be ON
CMOS Working Principle
both, either
In ________________ a collection of n-type MOSFETs is arranged in a pull-down network between the output and the low voltage power supply rail (Vss or quite often ground).
CMOS Working Principle
CMOS logic gates
Instead of the load resistor of NMOS logic gates, CMOS logic gates have a collection of ________________ in a ________ network
between the output and the higher voltage rail (often named Vdd).
CMOS Working Principle
p-type MOSFETs, pull-up
Thus, if both a p-type and n-type transistor have their gates connected to the same input, the p-type MOSFET will be ____ when the n-type MOSFET is ____, and vice-versa.
CMOS Working Principle
ON, OFF
The ________ are arranged such that one is ON and the other OFF for any input pattern.
CMOS Working Principle
networks
CMOS offers relatively (1)________, (2)________________, (3)________________ in both states, and will operate over a wide range of source and input voltages (provided the source voltage is fixed).
CMOS Working Principle
- high speed
- low power dissipation
- high noise margins
The inverter circuit as shown in the figure below. It consists of PMOS and NMOS FET. The ________ serves as the gate voltage for both transistors.
CMOS Inverter
input A
The NMOS transistor has input from ____ (ground) and the PMOS transistor has input from _____.
CMOS Inverter
Vss, Vdd
The terminal Y is output. When a high voltage (~ Vdd) is given at input terminal (A) of the inverter, the PMOS becomes an ____________, and NMOS switched OFF so the output will be ________ to Vss.
CMOS Inverter
open circuit, pulled down
When a ____________ (<Vdd, ~0v) applied to the inverter, the NMOS switched OFF and PMOS switched ON. So the output becomes Vdd or the circuit is pulled up to Vdd.
CMOS Inverter
low-level voltage
figure shows a 2-input Complementary MOS NAND gate. It consists of ____________ NMOS transistors between Y and Ground and ____________ PMOS transistors between Y and VDD.
CMOS NAND Gate
two series, two parallel
If either input A or B is ________, at least one of the NMOS transistors will be ____, breaking the path from ____________. But at least one of the pMOS transistors will be ____, creating a path from
CMOS NAND Gate
logic 0, OFF (Y to Ground), ON (Y to VDD)
the output Y will be high. If ________ are high, both of the nMOS transistors will be ____ and both of the pMOS transistors will be ____. Hence, the output will be ________.
CMOS NAND Gate
both inputs, ON, OFF, logic low
A 2-input NOR gate is shown in the
figure below. The ____________ are in parallel to pull the output low when either input is high.
CMOS NOR Gate
NMOS transistors
The ________________ are in series to pull the output high when both inputs are low, as given in the below table. The ________ is never left floating.
CMOS NOR Gate
PMOS transistors, output
