Chapter 6 Flashcards
registers
group of FFs that share a common clock and each store 1bit
register with parallel load
- common clock triggers all FFs and the binary inputs transfer into the register
- each FF has separate input and output
- have common input Clear_b to reset input of all FFs (0 = FF reset asynchronously)
shift register
register that shifts the binary info held in each cell to the neighbouring cell
- has common clk pulses
serial input/output of shift register
first input into first register
last output from last register
universal shift register
bidirectional and has parallel-load capabilities
universal shift register mode control
s1 s0 operation
0 0 no change
0 1 shift right
1 0 shift left
1 1 parallel load
universal shift register usees _____ FF
D
counter
register that goes though a predetermined sequence of binary states
binary counter
- counter that follows binary number sequence
- nbit binary counter has n FF and can count from 0 to 2^n-1
ripple counter
FF output transition is the source for triggering the other FFs
- clock input only goes into one FF
synchronous counter
the clock inputs of all FFs receive a common clock impulse
an n-bit ripple counter is called a _____
modulo-N counter
N = 2^n
T inputs of a binary ripple counter _________
are permanent logic 1, so each FF complements once there is a negative transition
what type of FFs does a BCD counter use
T
what is the purpose of the output y of a BCD counter
to initiate restart when value reaches 9
