Chapter 5 Flashcards
sequential circuit
outputs are a function of the inputs and the state of the storage elements (aka past inputs)
synchronous sequential circuits
behavior can be defined from the signals at discrete instants of time, uses a clock signal
asynchronous sequential circuit
behavior depends on input signals at any instant of time and the order in which the inputs change
- use time delay storage elements
latches
- storage elements that work with signal levels
level sensitive devices
operate with signal levels (0 or 1)
edge sensitive devices
operate with signal transitions (high to low or low to high)
flip flops are ______ sensitive devices
edge
S-R Latch
-2 cross coupled NOR or AND gates
- has 2 inputs: S and R
S-R latch truth table
S R Q Q’
1 0 1 0 (set)
0 1 0 1 (reset)
0 0 x x (Q doesnt change)
1 1 0 0 (forbidden)
S-R latch with control input
third input, En, is NANDed with both inputs before going into S-R latch
if En is 0, there is no change
D-Latch
gets rid of forbidden state of S-R latch, has only 2 inputs (D and En), D fulfills role of S and R by going through a not gate to become R
D-Latch truth table
D Next
0 Reset
1 Setq
flip flop
- 1 bit memory element
the output-input relationship of a FF is defined by a _______ or _______
characteristic table or characteristic equation
direct inputs
- inputs that set or reset their states independent of the clock, so come in through bottom of diagram
D flip flop construction
- master-slave flip flop
- uses two D latches and an inverter
- Output of flip flop 1 fed to FF2
- regular clock enters FF1(master) and then is inverted before entering FF2 (slave)
D FF
- input enters master latch when clock goes up, then when clock goes down that information transfers to the slave latch/final output
draw a JK flipflop
- J, Q’ and Clk enter a NAND gate (output w1)
- K, Q, and clk enter a NAND gate (output w2)
- w1 and Q’ enter a NAND gate (output Q)
- w2 and Q enter a NAND gate (output Q’)
T Flip Flop from JK
a j-k flip flop when J and K are tied together
basic principle of T FF
complementing or not complementing last state
Latches are faster or slower than FF
faster
form of state equations
A(t+1) = Ax+B’x
is the output of a sequential circuit in the form y(t+1) or y(t)
y(t)
parts of a state table
present state, input, next state, output
state diagrams have a form x/x on the arrow, which is each?
input/output
what is in the circles on state diagrams
state of flip flops
steps of analysis of clocked sequential circuit
circuit diagram
state equations
state table
state diagram
Moore machine
output only depends on current states
Mealy machine
output depends on current states and inputs
what does a characteristic table describe
flip flop operations
excitation table def
values of FF inputs for a given state transition
sequential circuit design procedure
- derive state diagram
- assign binary values to the states
- obtain binary coded state table
- choose the type of FF
- derive input equations using next state values and excitation tables
- simplify using Kmap
- draw logic diagram
