Chap 1 Flashcards

1
Q

The processor controls the operation of the computer and performs its data processing functions

A

TRUE

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2
Q

It is possible for a communications interrupt to occur while a printer interrupt is being processed.

A

TRUE

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3
Q

A system bus does not transfer data between the computer and its external environment.

A

TRUE

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4
Q

Cache memory is invisible to the OS.

A

TRUE

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5
Q

With interrupts, the processor can not be engaged in executing other instructions while an I/O operation is in progress.

A

FALSE

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6
Q

Digital Signal Processors deal with streaming signals such as audio and video.

A

TRUE

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7
Q

The fetched instruction is loaded into the Program Counter.

A

FALSE

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8
Q

Interrupts are provided primarily as a way to improve processor utilization.

A

TRUE

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9
Q

The interrupt can occur at any time and therefore at any point in the execution of a user program.

A

TRUE

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10
Q

Over the years memory access speed has consistently increased more rapidly than processor speed.

A

FALSE

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11
Q

An SMP can be defined as a stand-alone computer system with two or more similar processors of comparable capacity.

A

TRUE

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11
Q

The Program Status Word contains status information in the form of condition codes, which are bits typically set by the programmer as a result of program operation.

A

FALSE

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12
Q

An example of a multicore system is the Intel Core i7.

A

TRUE

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13
Q

In a two-level memory hierarchy the Hit Ratio is defined as the fraction of all memory accesses found in the slower memory.

A

FALSE

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14
Q

The operating system acts as an interface between the computer hardware and the human user.

A

TRUE

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15
Q

The four main structural elements of a computer system are:

A

Processor, Main Memory, I/O Modules and System Bus

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16
Q

The ___________ holds the address of the next instruction to be fetched.

A

Program Counter

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17
Q

The ___________ contains the data to be written into memory and receives the data read from memory.

A

memory buffer register

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18
Q

Instruction processing consists of two steps:

A

fetch and execute

19
Q

The ___________ routine determines the nature of the interrupt and performs whatever actions are needed.

A

interrupt handler

20
Q

The unit of data exchanged between cache and main memory is __________.

A

block size

21
Q

The _________ chooses which block to replace when a new block is to be loaded into the cache and the cache already has all slots filled with other blocks.

A

replacement algorithm

22
Q

__________ is more efficient than interrupt-driven or programmed I/O for a multiple-word I/O transfer.

A

Direct memory access

23
Q

The _________ is a point-to-point link electrical interconnect specification that enables high-speed communications among connected processor chips.

A

QPI

24
Q

Small, fast memory located between the processor and main memory is called:

A

Cache memory

25
Q

In a uniprocessor system, multiprogramming increases processor efficiency by:

A

Taking advantage of time wasted by long wait interrupt handling

26
Q

The two basic types of processor registers are:

A

User-visible and Control/Status

27
Q

When an external device becomes ready to be serviced by the processor the device sends a(n) __________ signal to the processor.

A

interrupt

28
Q

One mechanism Intel uses to make its caches more effective is ________, in which the hardware examines memory access patterns and attempts to fill the caches speculatively with data that is likely to be requested soon.

A

prefetching

29
Q

A __________ organization has a number of potential advantages over a uniprocessor organization including performance, availability, incremental growth, and scaling.

A

symmetric multiprocessor

30
Q

The invention of the ________ was the hardware revolution that brought about desktop and handheld computing.

A

microprocessor

31
Q

To satisfy the requirements of handheld devices, the classic microprocessor is giving way to the ________, where not just the CPUs and caches are on the same chip, but also many of the other components of the system, such as DSPs, GPUs, I/O devices and main memory.

A

System on a Chip (SoC)

32
Q

The processing required for a single instruction is called a(n) _________ cycle.

A

instruction

33
Q

The fetched instruction is loaded into the _________.

A

Instruction Register (IR)

34
Q

When an external device is ready to accept more data from the processor, the I/O module for that external device sends an ____________ signal to the processor.

A

interrupt request

35
Q

The ___________ is a device for staging the movement of data between main memory and processor registers to improve performance and is not usually visible to the programmer or processor.

A

Cache

36
Q

External, nonvolatile memory is also referred to as _________ or auxiliary memory.

A

secondary memory

37
Q

When a new block of data is read into the cache the ____________ determines which cache location the block will occupy.

A

mapping function

38
Q

In a _______ multiprocessor all processors can perform the same functions so the failure of a single processor does not halt the machine.

A

symmetric

39
Q

A __________ computer combines two or more processors on a single piece of silicon.

A

Multicore

40
Q

A Control/Status register that contains the address of the next instruction to be fetched is called the ____________.

A

Program Counter (PC)

41
Q

Each location in Main Memory contains a _________ value that can be interpreted as either and instruction or data.

A

binary number

42
Q

A special type of address register required by a system that implements user visible stack addressing is called a ______.

A

stack pointer.

43
Q

Registers that are used by system programs to minimize main memory references by optimizing register use are called ________.

A

user-visible registers

44
Q

The concept of multiple programs taking turns in execution is known as ___________.

A

Multiprogramming