Chap 1 Flashcards
The processor controls the operation of the computer and performs its data processing functions
TRUE
It is possible for a communications interrupt to occur while a printer interrupt is being processed.
TRUE
A system bus does not transfer data between the computer and its external environment.
TRUE
Cache memory is invisible to the OS.
TRUE
With interrupts, the processor can not be engaged in executing other instructions while an I/O operation is in progress.
FALSE
Digital Signal Processors deal with streaming signals such as audio and video.
TRUE
The fetched instruction is loaded into the Program Counter.
FALSE
Interrupts are provided primarily as a way to improve processor utilization.
TRUE
The interrupt can occur at any time and therefore at any point in the execution of a user program.
TRUE
Over the years memory access speed has consistently increased more rapidly than processor speed.
FALSE
An SMP can be defined as a stand-alone computer system with two or more similar processors of comparable capacity.
TRUE
The Program Status Word contains status information in the form of condition codes, which are bits typically set by the programmer as a result of program operation.
FALSE
An example of a multicore system is the Intel Core i7.
TRUE
In a two-level memory hierarchy the Hit Ratio is defined as the fraction of all memory accesses found in the slower memory.
FALSE
The operating system acts as an interface between the computer hardware and the human user.
TRUE
The four main structural elements of a computer system are:
Processor, Main Memory, I/O Modules and System Bus
The ___________ holds the address of the next instruction to be fetched.
Program Counter
The ___________ contains the data to be written into memory and receives the data read from memory.
memory buffer register
Instruction processing consists of two steps:
fetch and execute
The ___________ routine determines the nature of the interrupt and performs whatever actions are needed.
interrupt handler
The unit of data exchanged between cache and main memory is __________.
block size
The _________ chooses which block to replace when a new block is to be loaded into the cache and the cache already has all slots filled with other blocks.
replacement algorithm
__________ is more efficient than interrupt-driven or programmed I/O for a multiple-word I/O transfer.
Direct memory access
The _________ is a point-to-point link electrical interconnect specification that enables high-speed communications among connected processor chips.
QPI