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A Level Comp Sci Paper 1 > 1.1.1 Structure And Function Of The Processor > Flashcards

1.1.1 Structure And Function Of The Processor Flashcards

1
Q

What is the CPU?

A
  • Central Processing Unit
  • CPU is often described as the brains of the computer
  • CPUs contain a clock that sends signals to keep the timing for all the processes
  • Carries out all mathematical and logical operations
  • Measured in Hertz
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2
Q

1 Hertz?

What is processor speed

A

1 pulse per second

Processor speed is measured by the number of clock cycles a CPU can perform in a second

Equation: Frequency = 1/time

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3
Q

1 kilohertz?

A

1000 pulses per second

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4
Q

1 Megahertz?

A

1,000,000 pulses per second

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5
Q

1 Gigahertz?

A

1,000,000,000 pulses per second

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6
Q

What is the ALU?

A
  • Arithmetic Logic Unit
  • Carries out the calculations (floating point multiplication)/logical operations (comparison tests)
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7
Q

What is the CU?

A
  • Sends out control signals to co-ordinate how the processor works
  • Sent via a control bus to connected devices.
  • It controls how data moves around the CPU and how it moves between CPU and memory
  • Decodes instructions and controls execution of instructions
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8
Q

What is the PC?

A
  • Program Counter
  • Holds the address of the next instruction to be executed
  • PC keeps track of the memory location of the line of machine code being executed
  • It gets incremented by 1 with each FDE cycle
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9
Q

What is the Accumulator?

A
  • Acc stores the results of calculations made by the ALU
  • Temporary storage for data being processed
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10
Q

What is the MDR?

A
  • Memory Data Register
  • Temporarily stores the data that has been fetched from or stored in memory
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11
Q

What is the MAR?

A
  • Memory Address Register
  • The instruction to which the PC is pointing is loaded into MAR
  • Stores the address of the data or instructions that are to be fetched from or sent to
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12
Q

What is the CIR?

A
  • Current Instruction Register
  • Stores the instruction currently being decoded and executed into opcode and operand
  • Small memory location inside the CPU to assist with the fetch-execute cycle
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13
Q

What is the machine code?

A
  • Machine code is the binary representation of an instruction, split into OPCODE and the instruction’s data
  • Machine code is effective but not user friendly to programmers
  • We solve this using Assembly Code
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14
Q

What is Assembly Code?

A
  • 1 Above machine code, allows the programmer to write code using mnemonics, which represent machine code instructions
  • Examples MOV - moves a value to a register. ADD - adds a value and stores in ACC
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15
Q

What is the Little Man Computer?

A
  • Simplified architecture to help students to understand the concept of machine code and instruction sets
  • It takes the f_orm of assembly code mnemonics_ and has a limited set of instructions compared to assembly code
  • Only has 2 registers : ACC and PC. Data and instructions are stored in memory locations - mailboxes
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16
Q

A Von Neumann computer is a computer that…

A
  • Uses a single processor
  • Uses 1 memory for both instructions and data.
  • One system bus/ single set of buses
  • Executes programs 1 at a time using Fetch-Decode-Execute
  • Has special registers , a control unit and ALU
  • Program and data in same format
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17
Q

What are Registers and examples?

A
  • Tiny areas of extremely fast memory located in the CPU
  • Used to temporarily store data
  • PC, MAR, MDR, CIR, Accumulator
  • To enable the fetch-decode-execute cycle to operate
18
Q

What are buses?

A
  • Are a set of parallel wires which connect 2 or more components inside the CPU
  • There are 3 buses in the CPU:
    • Data bus
    • Control bus
    • Address bus
19
Q

What is the Data Bus

A
  • This bus is bi-directional or a set of wires (meaning bits can be carried in both directions)
  • Used for transporting data and instructions between components
20
Q

What is the Address Bus?

A
  • Used to transmit (pass from 1 to another) memory address from CPU to main memory (2 components) where data is to be sent or retrieved from
21
Q

What is the Control Bus

A
  • It is a bi-directional bus used to transmit control signals from the control unit to internal and external components of the CPU.
  • This bus co-ordinates the use of address and data bus and provides status information between system components
22
Q

What is Pipelining?

A
  • The process of completing fetch, decode and execute of 3 separate instructions simultaneously.
  • This reduces the time the CPU is left idle
  • the output of one operation is the input to the next
23
Q

What do Contemporary Processors use in order to improve performance?

A
  • Contemporary processors use a combination of Harvard and Von Neumann architecture.
  • Two separate areas of memory -one for instructions & one for data - instructions and data can be accessed concurrently
  • Pipelining - whilst an instruction is being executed the next can be decoded and the subsequent one fetched
  • Multiple Cores - Each core acts as a separate processing unit
24
Q

What is the Harvard Architecture?

A
  • Harvard architecture has physically separate memories for instructions and data, more commonly used with embedded processors.
  • This is useful for when memories have different characteristics, i.e. instructions may be read only, while data may be read-write.
25
Q
  1. What is OPCODE
  2. What is OPERAND
A
  • OPCODE = First 4 bits- What you want the instruction to do
  • OPERAND = Last 4 bits - What you want the instruction to do it to
26
Q

What happens in the Fetch part of the Fetch-Decode- Execute cycle

A
  1. The PC copies address of the next instruction it contains to MAR then PC is incremented.
    1. This can be changed by a jump command
  2. The MAR places the address to be used into the address bus
  3. The CU triggers a read signal that sent along control bus that causes main memory to read that memory address and place the instructions being asked for onto the Data Bus
  4. The instruction on the Data Bus is loaded into MDR
  5. The MDR copies instruction into CIR
27
Q

What happens in the Decode part in the Fetch-Decode-Execute part of the cycle

A
  • The CPU examines the instruction in the CIR and ‘decodes’ it
  • This means a special part in the CPU called the ‘decode unit’ will make the CPU carry ready to carry out the instruction
  • It does this by issuing a series of ‘micro instruction’
28
Q

What happens in the Execute part of the Fetch-Decode-Execute cycle

What does the CPU do whilst executing an instruction?

A
  • The instruction in the CIR is carried out (executed) by the CPU.
  • The part that executes instructions is called the ‘execute unit’
  • The CPU resets to point to the next instruction
29
Q

What is Clock Speed?

A
  • Measured in hertz
  • A single clock cycle is a single FDE cycle
  • Gives more cycles per second, more instructions can be executed per second, so the program takes less time to run
30
Q

Name the 3 factors that affect the performance of the CPU

A
  • Clock Speed
  • Number of Cores
  • Cache Memory
31
Q

What is Cache Memory?

A
  • Stores frequently used instructions and data. Between processor and memory
  • Normally 3 levels
    • 1- smallest, expensive, closer to CPU
    • 3- further away and bigger
  • Cache is fast access memory located close to / on the CPU
  • Using cache memory means the processor has to access main memory less often so performance is increased
32
Q

What is the Number of Cores

A
  • It becomes increasingly difficult to improve clock speed so manufactures increase the number of cores on a single chip
  • More cores means more data can be processed at the same time
  • Each core is able to run its own Fetch-Decode-Execute Cycle
33
Q

What is Von Neumann Bottleneck

A
  • Every piece of data and instruction has to pass across the data bus in order to move from Main Memory into the CPU
  • This is a problem cause the data bus is a lot slower than at the rate of the CPU can carry out instructions
  • If nothing were done the CPU would waste time waiting around
34
Q

What is a micro- processor + name an example

What is a system on Chip (SOC)

A
  • A dedicated processor for carrying a specific task
  • A CPU is an up-scaled micro-processor as it can perform many tasks
  • Is an integrated circuit that combines computer components and other electronic systems on a single chip
35
Q

What is the relationship between machine code and assembly code

A
  • Assembly code is a step above machine code, allowing coder to code using mnemonics, which represent machine code instructions
  • Each assembly code instruction has 1-1 mapping with a machine code instruction
36
Q

What is the memory unit

A
  • Stores currently running programs, current files and the OS.
  • Takes instructions and data from main memory into registers to be processed
37
Q

What do branches allow LMC to do

A
  • Allow decisions and loops to be coded in LMC.
  • BRA Looptop does an unconditional jump to the top of the loop
  • BRP endloop breaks out of the loop. This will only branch if the value in ACC is positive or 0 (considered positive)
38
Q

The assembly language code ‘ADD 6’ has been fetched. Which register will this be stored in to be decoded?

A

Current instruction register

39
Q

Assembly language instructions such as BRZ, BRP and BRA can change the program flow by changing which register?

A

Program counter

40
Q

What other registers are also used in the fetch-decode-execute cycle?

A

Interrupt Register…

…holds a control signal identifying an interrupt

Index register…

…holds the base address for an array

A Level Comp Sci Paper 1 (16 decks)

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