1.1.1 - Structure and Function of the Processor

Question 1

What operations does the arithmetic logic unit do?

Answer 1

Arithmetical operations (+, -, *, /)
Logical operations (AND, OR, NOT, XOR)

Question 2

What is the function of the control unit?

Answer 2

The control unit directs the operations of the CPU. It does this by sending control signals to areas of the CPU to coordinate the operations.

Question 3

Name the five registers in the CPU.

Answer 3

Program counter
Accumulator
Memory address register
Memory data register
Current instruction register

Question 4

What is the function of the program counter?

Answer 4

The PC holds the address of the next instruction to be executed.

Question 5

What is the function of the accumulator?

Answer 5

The accumulator stores the results of calculations.

Question 6

What is the function of the memory address register?

Answer 6

The MAR holds the address of the location that is to be read from or written to.

Question 7

What is the function of the memory data register?

Answer 7

The MDR temporarily stores data that has been read or data that needs to be written.

Question 8

What is the function of the current instruction register?

Answer 8

The CIR holds the current instruction being executed, divided into operand and opcode.

Question 9

What is the definition of a bus?

Answer 9

A bus is a set of parallel wires that connect two or more components inside the CPU.

Question 10

Name the three buses in the CPU.

Answer 10

Data bus, address bus, control bus.

Question 11

What are the three buses in the CPU collectively called?

Answer 11

The system bus.

Question 12

What is the function of the data bus?

Answer 12

The data bus is a bi-directional bus that is used to transport data and instructions between components.

Question 13

What is the function of the address bus?

Answer 13

The address bus is used to transmit the memory addresses that specify where data is to be sent or retrieved from.

Question 14

What is the width of the address bus proportional to?

Answer 14

The number of addressable memory locations.

Question 15

What is the function of the control bus?

Answer 15

The control bus is a bi-directional bus that is used to transmit control signals between internal and external components.

Question 16

What does the control signal ‘bus request’ do?

Answer 16

It shows that a device is requesting the use of the data bus.

Question 17

What does the control signal ‘bus grant’ do?

Answer 17

It shows that the CPU has granted access to the data bus.

Question 18

What does the control signal ‘memory write’ do?

Answer 18

It causes data to be written into the addressed location.

Question 19

What does the control signal ‘memory read’ do?

Answer 19

It causes data to be read from a specific location to be placed onto the data bus.

Question 20

What does the control signal ‘interrupt request’ do?

Answer 20

It shows that a device is requesting access to the CPU.

Question 21

What does the control signal ‘clock’ do?

Answer 21

It is used to synchronise operations in the CPU.

Question 22

What does the operand contain?

Answer 22

The data or the address of the data upon which the operation is to be performed.

Question 23

What does the opcode contain?

Answer 23

The type of instruction to be executed.

Question 24

What is the function of pipelining?

Answer 24

It increases the efficiency of the CPU by reducing the amount of time the CPU is kept idle.

Question 25

How does pipelining work?

Answer 25

It completes the fetch, decode and execute cycles of three separate instructions simultaneously.

Question 26

What are the two different types of pipelining?

Answer 26

Instruction pipelining and arithmetic pipelining.

Question 27

How does arithmetic pipelining differ from instruction pipelining?

Answer 27

Instruction pipelining is separating out the instruction into fetching, decoding and executing and doing these simultaneously.

Arithmetic pipelining splits the arithmetic operations up and overlaps them when they are performed.

Question 28

What are the four stages in the ‘fetch’ stage of the fetch-decode-execute cycle?

Answer 28

Address from the PC is copied into the MAR.
Instruction held at that address is copied to the MDR via the data bus.
Simultaneously, the contents of the PC is incremented by 1.
The value held in the MDR is copied into the CIR.

Question 29

What happens during the ‘decode’ stage of the fetch-decode-execute cycle?

Answer 29

The contents of the CIR are split into operand and opcode.

Question 30

What happens during the ‘execute’ stage of the fetch-decode-execute cycle?

Answer 30

The decoded instruction is executed and the ALU performs any operations required. The result is stored in the accumulator.

Question 31

Name three factors that affect the performance of the CPU.

Answer 31

Clock speed
Number of cores
Amount and type of cache memory.

Question 32

How does the clock speed affect the performance of the CPU?

Answer 32

The clock speed is the number of instructions completed per second so a higher clock speed increases the number of instructions completed per second.

Question 33

How does the number of cores affect the performance of the CPU?

Answer 33

A computer with multiple cores can complete more than one fetch-decode-execute cycle at any given time so more cores equal higher CPU performance.

Question 34

Why does doubling the number of cores not double CPU performance?

Answer 34

Not all programs can utilise multiple cores efficiently as they have not been designed to do so.

Question 35

How does the amount and type of cache memory increase CPU performance?

Answer 35

Accessing the cache is faster than accessing the main memory. Regularly used instructions are kept in the cache and so data retrieval is faster.

The type of cache memory affects the speed of the memory.

Question 36

Which level of cache memory is the fastest?

Answer 36

Level 1 cache is the fastest.

Question 37

Which level of cache memory has the greatest capacity?

Answer 37

Level 3 cache has the greatest capacity.

Question 38

Name the two types of computer architecture.

Answer 38

Von Neumann architecture and Harvard architecture.

Question 39

Describe the main features of von Neumann architecture.

Answer 39

This architecture includes the basic components of the computer and processor in which shared memory and a shared data bus is used for both data and instructions. Von Neumann architecture is built on the stored program concept.

Question 40

Describe the main features of Harvard architecture.

Answer 40

Harvard architecture has physically separate memories for instructions and data. This is more commonly used with embedded processors.

Question 41

What are the advantages of using von Neumann architecture?

Answer 41

Processors are cheaper to develop as the control unit is easier to design.

Programs can be optimised in size.

Question 42

What are the advantages of using Harvard architecture?

Answer 42

Quicker execution as data and instructions can be fetched in parallel.

Memories can be different sizes, which can make more efficient use of space.

Question 43

What does contemporary processing mean?

Answer 43

Contemporary processing is where a processor uses a combination of von Neumann and Harvard architecture. Usually, von Neumann is used for main memory and Harvard is used for the cache.