1.1 Processors Flashcards
What is the accumulator?
A special register to temporarily store the results of operations performed by the ALU
What is the address Bus?
Carries the memory location addresses to be read from or written to (cpu to ram)
What is the arithmetic logic unit?
A part of the CPU that performs arithmetic calculations and logical operations on data for the computer programs
Buses
A physical set of parallel wires connecting and carrying groups of bits between several components of a computer
What is cache?
A small and fast but expensive memory in the CPU used to store instructions and data that are accessed regularly
Clock speed
The frequency at which the internal clock generates signals switching between 0 and 1. It controls how often instructions are executed and data is fetched
Contemporary architecture
A modern architecture combining Von Neumann and Harvard architectures
What is the control bus?
A bi-directional bus carrying control signals from the CU to synchronise access and use of data
What is the Control Unit
A part of the CPU that controls and manages the execution of instructions. It sends control signals to coordinate execution and controls FDE cycles and buses.
What is the Current instruction register?
A special register that stores the current instruction being executed and decoded. These instructions and divided into operand and opcode.
What is the data bus?
A bi-directional bus for carrying data and instructions between the processor and memory
FDE cycles
Fetching from memory, decoding and executing the instruction
What is fetching
Supplying the address and retrieving the instruction from memory
Harvard architecture
A computer architecture that stores data and instructions in separate memories to allow the next instruction to be read whilst data is currently being read or written
Memory address register
A special register that stores the memory address of the next instruction to load or data to use
Memory data register
A special register that temporarily stores data to be read from or written to in main memory
Number of cores
A core is a processing unit that handles instructions with its own FDE cycles. Multi-core processors have multiple cores that can run simultaneously
Pipelining
The simultaneous decoding of several instructions by decoding the next instruction and fetching the one after while the current one is being executed
Program counter
A special purpose register that stores the address of the next instruction to execute
Registers
Special memory cells that can be accessed quickly. They temporarily store data and control information
Von Neumann architecture
Architecture where a single control unit manages program control via a linear sequence of FDE cycles
Complex instruction set computer (CISC)
A more complicated and expensive processor design that can execute a series of tasks in a single complex instruction built into the hardware. The variety of instructions means less RAM is used.
What cannot be used with a complex instruction set computer?
Pipelining
What is a Graphic processing unit?
A specialised processing unit with a huge number of small cores that allow efficient parallel computation for tasks such as computer graphics, machine learning, data mining
Multicore systems
Several CPU cores are incorporated into a single processor chip to help distribute wotkload
Parallel processing system
Splitting a job into several subtasks which are simultaneously carried out by each core in the system
Reduced instruction set computer (RISC)
A simpler processor design that can only execute a single simple instruction each clock cycle. This used more RAM but allows pipelining.
Flash storage
A solid state technology that stores data on a collection of memory chips, no moving parts as data is accessed by software
Input devices
Peripheral devices that allow the user to communicate and to pass readable data into a computer, decode it and send it to the CPU
Magnetic storage
Relies on the polarisation of magnetic particles to store bits on a magnetic material which is typically moved mechanically. A high capacity and low cost means of storage
Optical storage
Data is stored in the reflectivity (pits and lands) of a surface, and is read and written to by a laser
Output devices
Peripheral devices that take and convert signals from a computer into a human-readable form
Random access memory
Memory used to store programs and data in use by the computer, Quick access times by al data is lost when the computer is turned off (volatile)
Read only memory
Memory used to store information that is permanently required to boot up and run the computer. Cannot be written to and is non-volatile.
Storage device
Any medium on which data can be stored even when powered off
Virtual storage
Using the hard disk as though it were an extension of memory to free up more RAM for current programs
Name 3 jobs the control unit performs
- Controlling and coordinating the activities of the CPU
- Managing the flow of data between the CPU and other devices
- Accepting the next instruction
- Decoding instructions
- Storing the resulting data back in memory
Name three control signals sent by the control bus
- Bus request: shows that a device is requesting the use of the data bus
- Bus grant: shows that the CPU has granted access to the data bus
- Memory write: data is written into the addressed location using this bus
- Memory read: data is read from a specific location to be placed onto the data bus,
- Interrupt request: shows that a device is requesting access to the CPU
- Clock: used to synchronise operations
What is assembly code
uses mnemonics to represent instructions. Simplified way of representing machine code
In assembly what is the instruction divided into
Operand and opcode (happens in the CIR)
What does the operand contain?
Data or the address of the data upon which the operation is to be performedWh
What does the opcode specify?
Type of instruction to be executed
How many separate FDE cycles need to be running simultaneously for pipelining?
3
Where is appropriate data held in pipelining?
A bugger in close proximity to the CPU until is required (one fethced, one decoded and one executed)
What is pipelining aimed to reduce?
The amount of the CPU which is kept idle
What is pipelining separated into?
Instruction pipelining and arithmetic pipelining