Week 8 Flashcards
Draw out truth tables for And, Or or Xor
See 8.1 at 5 min
What is a bitwise boolean operation?
A bitwise boolean operation is applied separately to every bit of a binary codeword.
What do shift left (shiftl) and shift right (shiftr) do?
If we have Ra, Rb, Rc: shiftl shifts Rb left by Rc places and stores in Ra. We add zeroes to the end of Ra for the spaces that we’ve shifted and on the other side, the bits are shifted out and dropped off.
Similarly for shiftr, except for the other side.
What kind of number will MUL, DIV, CMPGT, CMPLT work with?
Two’s complement
What kind of number will ADD, SUB work with?
Unsigned or two’s complement
What kind of number will CMPEQ work with?
Any codewords, including non-numeric ones
What happens in R15 when we DIV?
The remainder will go into R15. It will override what is already in R15.
What is an instruction cycle?
An instruction cycle is what it takes to completely process an instruction (fetch it, then execute it!)
What is the memory cycle?
The time involved in reading or writing a single word from/to a single memory location. Memory cycle will take a fixed amount of time.
How many memory cycles does an RRR instruction use?
1 (to fetch the operation word)
How many memory cycles does a JUMP take?
To fetch it, it has two words of machine code.
So two memory cycles
What does the control unit maintain?
Information about the current and next instruction.
What two registers will you find always in a CPU?
1) instruction register: contains the operation word of the instruction being executed
2) Program counter: contains the address of the next instruction to be executed.
What are the two machine specific control registers in Sigma 16?
1) The Address Register: contains the effective address specified in an RX or X instruction. It is used to hold initially any base address that’s contained in an indexing mode.
2) The Data Register holds temporary data.
Does the number of memory cycles required to fetch the whole instruction affect the time?
Yes, the more memory cycles, the slower the instruction takes to execute/run.
Memory cycles are much slower than internal operations.