Week 4 Flashcards
What do machine code instructions contain?
- Some operation (op-code) such as add, jump etc.
- Necessary auxiliary info (where to get the operands, store results, where to jump to)
Where are instructions held?
In memory (as consecutive addresses) as one or more words.
What is the op-code?
It’s part of the operation word. It tells the control unit (CU) which operation this is e.g. ADD, MULTIPLY etc
How do we prevent instructions from becoming too long?
Restrictions may be imposed on where a particular instruction can be accessed.
What are addressing modes in the CPU design?
They specify where an operand for an instruction is to be found or a result should be stored. There are 5 common examples:
1) immediate, e.g. ADD 2
2) Absolute, e.g. gives the numeric address of the memory location involved
3) Register indirect, e.g. tells the control unit to go to the register you specify and fully from memory the value correlating to the address
4) Indexed addressing, e.g. take the base address (memory address) and add to the number in the register.
What 3 things does Sigma 16 consist of?
It consists of:
- 16 registers (R0…R15 where R0 is always 0)
- the Program Counter
- 16-bit memory locations (16-bit memory locations with addresses 0000_16 to ffff_16)
Where are operands located?
In any memory location or register file register.
What is the effective address?
Where the operand is stored (either in memory location or reg file reg).
What is Sigma-16?
Virtual CPU (runs as software, not hardware), everything is 16-bits.
What is the op-field in Sigma 16?
The most significant 4-bits of the operation word (which is 16-bits long) is called the op-field.
What addressing modes are used in Sigma-16?
Register addressing and indexed addressing
What are the three Sigma 16 instruction formats?
RRR (Register Register Register)
RX
X
how many op codes are there in RRR instruction format?
14: \+ - x % compare less than compare equals compare greater than bitwise boolean: inv, and, or, xor logic shifts: shift left, shift right trap
Are all numbers in RRR 16 bit twos-complement or unsigned?
2’s complement
Which addressing mode does RRR instruction use?
register addressing
e.g. ADD R_x,R_y,R_z