Week 5 Flashcards
What is a halt state?
When the CPU stops executing instructions, i.e. it’s not doing anything.
A running computer should always be executing instructions. Halt states can happen if the comp is asleep or has crashed.
How do we get a CPU out of a halt state?
It need to be given an external signal i.e. reset (drastic) or interrupt (less drastic, e.g. moving a mouse or hitting a key on the keyboard).
What is a reset vector?
Processor loads the program counter to some predetermined address called the reset vector. It’s the start address of the start up code.
What is the reset handler?
The start up code that’s in memory. It’s start address is the reset vector. If this is not there, the computer will never leave its halt state. In modern systems, it’s in read-only memory.
First job of the reset handler: load the operating system.
What is a monitoring operating system?
The simplest of operating systems. It looks for commands coming from the user to tell it what to do.
What does Sigma 16 allow the user to do?
Load an image file into the (simulated) memory and have the (simulated) CPU execute it.
On Sigma16, where should machine code be loaded into in memory?
The very bottom or the memory location (0 is the start address).
You can’t put data into address 0
How do we stop the execution?
TRAP R0,R0,R0
Causes the program to stop and it goes back to the system.
What are two standard approaches that a compiler or assembler turns a HLL into assembly language?
1) Statement-by-statement style: every statement in the HLL should be taken as a stand-alone thing, and translated to assembly language. Each block of instructions begins by loading the variables it needs from memory, and finishes by storing any modified variable values back into memory.
Straight forward and clear, but can result in inefficiencies.
2) Register-variable style: instead of writing every variable back into its memory location, keep the variables in the register until you’ve finished with them, then write them out.
