Truth Tables and the Clock

Question 1

Why do we use truth tables?

Answer 1

To encode behaviour, by noting how each input codeword maps to each output codeword

Question 2

Why do we use the clock signal?

Answer 2

To create a sequence of operations (in RTL) we need time to structure it. Circuit imperfections such as propogation delay and rising/falling times are managed and hidden behind a logical delay, which we create using the alternating high/low clock signal. Each consecutive high/low pair is a clock cycle.

Question 3

Describe the difference between combinational and sequential gates.

Answer 3

Combinational gates perform logic value operations and have variable delay

Sequential gates perform logic value storage and require very particular delay values

Question 4

Describe the D flip-flop, giving its 3 principle signals

Answer 4

D is the input signal

Q is the output signal

Ck is the clock signal

Question 5

Where are the following delays measured from?

Propagation delay t_pd?

Set up time t_su?

Hold time t_h?

Answer 5

t_pd = Clock to Q

t_su = Clock back to D

t_h = Clock forward to D