Transistors, Logic Gates, and Combinational Logic

Question 1

Transistor

Answer 1

electrical device that acts as an electrical switch; typically made from silicon

Question 2

MOSFET

Answer 2

metal-oxide semiconductor field-effect transistor
a specialized fieldeffect transistor or FET; like all transistors, used for switching or amplifying signals
● nMOSFET (nMOS): channel carries negative charges (electrons)
● pMOSFET (pMOS): channel carries positive charges (holes)

Question 3

CMOS

Answer 3

Complimentary metal-oxide-semiconductor
Pairing nMOS and pMOS transistors together. p/n-type MOS act in a complementary way.
Furthermore, if pMOS parallel to each other than nMOS in a sequence and vice versa.
○ All CMOS gates must have 2 parts:
■ PUN (pullup network): pulls output “up” to PWR (logic 1)
● Rule: PUN can only contain PMOS transistors
■ PDN (pulldownnetwork): pulls output “down” to GND (logic 0)
● RULE: PDN can only contain NMOS transistors
○ Either PUN or PDN is “ON” at any given time (never both)
○ Output is taken where PUN and PDN intersect

Question 4

Gate delays

Answer 4

longest path through a circuit

• delay between change in input and and change in output
• Delays limit the rate at which you can compute/ number of operations per second

Question 5

PLA

Answer 5

Programmable Logic Array
Programmable logic device used to implement combination logic circuits.
Not most efficient, but it always works
Tool to go from truth table to logic gates

Question 6

Combinational logic

Answer 6

Using several logic gates together to create a logic circuit that performs work for us like adders, multipliers, etc.
Combinational because their outputs are strictly dependent on the combination of input values that are being applied to the structure right now.

Question 7

Multiplexer (MUX)

Answer 7

device that combines several analogs or digital input signals and forwards them into a SINGLE output line

Question 8

How a transistor works

Answer 8

○ Off: electrons cannot move between the source and drain, no path exists
under the gate. The transistor aka “the switch” is “OFF.”
○ On (how it works in nMOS transistor):
■ Positive charge repels holes from under the gate
■ Attracts electrons from source/drain regions
■ Creates an “ntype” channel under the oxide
● Why it’s called an “nMOS” transistor
■ Current can flow from drain to source; electrons enter source and exit drain (go from source to drain)
■ Electrons cannot penetrate oxide
● Electric field forms across oxide, why it’s called “FET”

Question 9

De Morgans Law

Answer 9

■ A NAND B = NOT (A AND B) = (NOT A) OR (NOT B)

■ A NOR B = NOT (A OR B) = (NOT A) AND (NOT B)

Question 10

Structure of N Bit Incrementer

Answer 10

N 1bit half adders combined

Question 11

Subtractor

Answer 11

negate combined with Nbit incrementer

Question 12

On what does speed of MOSFET depend

Answer 12

Length of Channel

Electron takes less time to travel across smaller distance

Question 13

Moore’s Law

Answer 13

Every 18 moths, # of transistors that fit into an IC will double

Question 14

Distributive Laws

Answer 14

A AND (B OR C) = (A AND B) OR (A AND C)
A OR (B AND C) = (A OR B) AND (A OR C)

Question 15

Associative Laws

Answer 15

A AND (B AND C) = (A AND B) AND C
A OR (B OR C) = (A OR B) OR C

Question 16

How many select lines do we need for a 16 input Mux?

Answer 16

Need to be able to select from 16.

Hence need 4 select lines = 2^4

Question 17

Mux vs. Decoder

Answer 17

n input lines. 2^n output lines. Only one output line = 1 at any given point in time. need 2 select/address lines to access right address
Mux: n input lines. Need 2^k> = n, i.e. k select lines, to select from the n input lines. Only one output.

Question 18

Short Circuit

Answer 18

if there is a direct link from power to ground

Question 19

Half vs. Full Adder

Answer 19

Half Adder: 2 Inputs A and B, cannot handle Carry-In, 2 Outputs: Carry Out and Sum
Full Adder: 3 Inputs: A, B, and Carry-In, 2 Outputs: Carry Out and Sum
Chaining several full-adder together = binary adder

Question 20

PLA

Answer 20

Can visualize any logic equation
Consists of an array of AND gates followed by an array of OR gates
# OR gates corresponds to the number of output columns in truth table
every AND gate represents the input combinations that lead to a 1 result
consists of only AND, OR and NOT gates

Question 21

Sequential Logic Circuits

Answer 21

Can do both: a) process information/make decisions and b) store information
base their decisions not only on the input values now present, but also on what has happened before/information stored