transistors Flashcards
When transistors are used in digital circuits they usually operate in the:
active region
breakdown region
saturation and cutoff regions
linear region
saturation and cutoff regions
Three different Q points are shown on a dc load line. The upper Q point represents the:
minimum current gain
intermediate current gain
maximum current gain
cutoff point
maximum current gain
A transistor has a mca12_1001a1.gif of 250 and a base current, IB, of 20 mu.gif A. The collector current, IC, equals:
500 uA
5 mA
50 mA
5 A
5 mA
A current ratio of IC/IE is usually less than one and is called:
beta
theta
alpha
omega
alpha
With the positive probe on an NPN base, an ohmmeter reading between the other transistor terminals should be:
open
infinite
low resistance
high resistance
low resistance
In a C-E configuration, an emitter resistor is used for:
stabilization
ac signal bypass
collector bias
higher gain
stabilization
Voltage-divider bias provides:
an unstable Q point
a stable Q point
a Q point that easily varies with changes in the transistor’s current gain
a Q point that is stable and easily varies with changes in the transistor’s current gain
a stable Q point
To operate properly, a transistor’s base-emitter junction must be forward biased with reverse bias applied to which junction?
collector-emitter
base-collector
base-emitter
collector-base
collector-base
The ends of a load line drawn on a family of curves determine:
saturation and cutoff
the operating point
the power curve
the amplification factor
saturation and cutoff
The C-B configuration is used to provide which type of gain?
voltage
current
resistance
power
voltage
The Q point on a load line may be used to determine:
VC
VCC
VB
IC
VB
A transistor may be used as a switching device or as a:
fixed resistor
tuning device
rectifier
variable resistor
variable resistor
Which is beta’s current ratio?
IC/IB
IC/IE
IB/IE
IE/IB
IC/IB
A collector characteristic curve is a graph showing:
emitter current (IE) versus collector-emitter voltage (VCE) with (VBB) base bias voltage held constant
collector current (IC) versus collector-emitter voltage (VCE) with (VBB) base bias voltage held constant
collector current (IC) versus collector-emitter voltage (VC) with (VBB) base bias voltage held constant
collector current (IC) versus collector-emitter voltage (VCC) with (VBB) base bias voltage held constant
collector current (IC) versus collector-emitter voltage (VCE) with (VBB) base bias voltage held constant
With low-power transistor packages, the base terminal is usually the:
tab end
middle
right end
stud mount
middle
When a silicon diode is forward biased, what is VBE for a C-E configuration?
voltage-divider bias
0.4 V
0.7 V
emitter voltage
0.7
With a PNP circuit, the most positive voltage is probably:
ground
VC
VBE
VCC
ground
Most of the electrons in the base of an NPN transistor flow:
out of the base lead
into the collector
into the emitter
into the base supply
into the collector
In a transistor, collector current is controlled by:
collector voltage
base current
collector resistance
all of the above
base current
Total emitter current is:
IE – IC
IC + IE
IB + IC
IB – IC
IB + IC
Often a common-collector will be the last stage before the load; the main function(s) of this stage is to:
provide voltage gain
provide phase inversion
provide a high-frequency path to improve the frequency response
buffer the voltage amplifiers from the low-resistance load and provide impedance matching for maximum power transfer
buffer the voltage amplifiers from the low-resistance load and provide impedance matching for maximum power transfer
For a C-C configuration to operate properly, the collector-base junction should be reverse biased, while forward bias should be applied to which junction?
collector-emitter
base-emitter
collector-base
cathode-anode
collector-emitter
The input/output relationship of the common-collector and common-base amplifiers is:
270 degrees
180 degrees
90 degrees
0 degrees
0 degrees
If a transistor operates at the middle of the dc load line, a decrease in the current gain will move the Q point:
off the load line
nowhere
up
down
down
Which is the higher gain provided by a C-E configuration?
voltage
current
resistance
power
power
Junction Field Effect Transistors (JFET) contain how many diodes?
4
3
2
1
2
When not in use, MOSFET pins are kept at the same potential through the use of:
shipping foil
nonconductive foam
conductive foam
a wrist strap
conductive foam
D-MOSFETs are sometimes used in series to construct a cascode high-frequency amplifier to overcome the loss of:
low output impedance
capacitive reactance
high input impedance
inductive reactance
high input impedance
A “U” shaped, opposite-polarity material built near a JFET-channel center is called the:
gate
block
drain
heat sink
gate
When testing an n-channel D-MOSFET, resistance G to D = , resistance G to S = , resistance D to SS = and 500 , depending on the polarity of the ohmmeter, and resistance D to S = 500 . What is wrong?
short D to S
open G to D
open D to SS
nothing
nothing
In the constant-current region, how will the IDS change in an n-channel JFET?
As VGS decreases ID decreases.
As VGS increases ID increases.
As VGS decreases ID remains constant.
As VGS increases ID remains constant.
As VGS decreases ID decreases.
A MOSFET has how many terminals?
2 or 3
3
4
3 or 4
3 or 4
IDSS can be defined as:
the minimum possible drain current
the maximum possible current with VGS held at –4 V
the maximum possible current with VGS held at 0 V
the maximum drain current with the source shorted
the maximum possible current with VGS held at 0 V
What is the input impedance of a common-gate configured JFET?
very low
low
high
very high
very low
JFET terminal “legs” are connections to the drain, the gate, and the:
channel
source
substrate
cathode
source
A very simple bias for a D-MOSFET is called:
self biasing
gate biasing
zero biasing
voltage-divider biasing
zero biasing
With the E-MOSFET, when gate input voltage is zero, drain current is:
at saturation
zero
IDSS
widening the channel
zero
With a 30-volt VDD, and an 8-kilohm drain resistor, what is the E-MOSFET Q point voltage, with ID = 3 mA?
6 V
10 V
24 V
30 V
6 V
When an input signal reduces the channel size, the process is called:
enhancement
substrate connecting
gate charge
depletion
depletion
Which JFET configuration would connect a high-resistance signal source to a low-resistance load?
source follower
common-source
common-drain
common-gate
source follower
How will electrons flow through a p-channel JFET?
from source to drain
from source to gate
from drain to gate
from drain to source
from drain to source
When VGS = 0 V, a JFET is:
saturated
an analog device
an open switch
cut off
saturated
When applied input voltage varies the resistance of a channel, the result is called:
saturization
polarization
cutoff
field effect
field effect
When is a vertical channel E-MOSFET used?
for high frequencies
for high voltages
for high currents
for high resistances
for high currents
When the JFET is no longer able to control the current, this point is called the:
breakdown region
depletion region
saturation point
pinch-off region
breakdown region
With a JFET, a ratio of output current change against an input voltage change is called:
transconductance
siemens
resistivity
gain
transconductance
Which type of JFET bias requires a negative supply voltage?
feedback
source
gate
voltage divider
gate
How will a D-MOSFET input impedance change with signal frequency?
As frequency increases input impedance increases.
As frequency increases input impedance is constant.
As frequency decreases input impedance increases.
As frequency decreases input impedance is constant.
As frequency decreases input impedance increases.
The type of bias most often used with E-MOSFET circuits is:
constant current
drain-feedback
voltage-divider
zero biasing
drain-feedback
The transconductance curve of a JFET is a graph of:
IS versus VDS
IC versus VCE
ID versus VGS
ID × RDS
ID versus VGS
The common-source JFET amplifier has:
a very high input impedance and a relatively low voltage gain
a high input impedance and a very high voltage gain
a high input impedance and a voltage gain less than 1
no voltage gain
a very high input impedance and a relatively low voltage gain
The overall input capacitance of a dual-gate D-MOSFET is lower because the devices are usually connected:
in parallel
with separate insulation
with separate inputs
in series
in series
What is the transconductance of an FET when ID = 1 mA and VGS = 1 V?
1 kS
1 mS
1 k
1 m
1 mS
Which component is considered to be an “OFF” device?
transistor
JFET
D-MOSFET
E-MOSFET
E- MOSFET
In an n-channel JFET, what will happen at the pinch-off voltage?
the value of VDS at which further increases in VDS will cause no further increase in ID
the value of VGS at which further decreases in VGS will cause no further increases in ID
the value of VDG at which further decreases in VDG will cause no further increases in ID
the value of VDS at which further increases in VGS will cause no further increases in ID
the value of VDS at which further increases in VDS will cause no further increase in ID
The primary function of the bias circuit is to
hold the circuit stable at VCC
hold the circuit stable at vin
ensure proper gain is achieved
hold the circuit stable at the designed Q-point
hold the circuit stable at the designed Q-point
A JFET
is a current-controlled device
has a low input resistance
is a voltage-controlled device
is always forward-biased
is a voltage-controlled device
A source follower has a voltage gain (Av) of
Av= gmRs/(1+gmRs)
The capacitor that produces an ac ground is called a(n)
coupling capacitor
dc open
bypass capacitor
ac open
bypass capacitor
The formula used to calculate the approximate ac resistance of the base-emitter diode (re) is
re=25mV/IE
The signal voltage gain of an amplifier, Av, is defined as:
Av=RC/RE
In a class B push-pull amplifier, the transistors are biased slightly above cutoff to avoid
crossover distortion
unusually high efficiency
negative feedback
a low input impedance
crossover distortion
The depletion-mode MOSFET
can operate with only positive gate voltages
can operate with only negative gate voltages
cannot operate in the ohmic region
can operate with positive as well as negative gate voltages
can operate with positive as well as negative gate voltages
Three different points are shown on a dc load line. The upper point represents the
minimum current gain
quiescent point
saturation point
cutoff point
saturation point
Which of the following conditions are needed to properly bias an npn transistor amplifier?
Forward bias the base/emitter junction and reverse bias the base/collector junction.
Forward bias the collector/base junction and reverse bias the emitter/base junction.
Apply a positive voltage on the n-type material and a negative voltage on the p-type material.
Apply a large voltage on the base.
Forward bias the base/emitter junction and reverse bias the base/collector junction.
Often a common-collector will be the last stage before the load; the main function of this stage is to
provide voltage gain
buffer the voltage amplifiers from the low-resistance load
provide phase inversion
provide a high-frequency path to improve the frequency response
buffer the voltage amplifiers from the low-resistance load
In order for feedback oscillators to have any practical value, the gain has to be
< 1
self-adjusting
stabilized
nonlinear
self-adjusting
To get a negative gate-source voltage in a self-biased JFET circuit, you must use a
voltage divider
source resistor
ground
negative gate supply voltage
source resistor
