analog to digital - computer Flashcards
The two basic types of signals are analog and:
digilog
digital
vetilog
sine wave
digital
Which of the following characterizes an analog quantity?
Discrete levels represent changes in a quantity.
Its values follow a logarithmic response curve.
It can be described with a finite number of steps.
It has a continuous set of values over a given range.
It has a continuous set of values over a given range.
ASCII stands for:
American Serial Communication Interface
Additive Signal Coupling Interface
American Standard Code for Information Interchange
none of the above
American Standard Code for Information Interchange
Which type of signal is represented by discrete values?
noisy signal
nonlinear
analog
digital
digital
A data conversion system may be used to interface a digital computer system to:
an analog output device
a digital output device
an analog input device
a digital printer
an analog output device
Sample-and-hold circuits in ADCs are designed to:
sample and hold the output of the binary counter during the conversion process
stabilize the ADCs threshold voltage during the conversion process
stabilize the input analog signal during the conversion process
sample and hold the ADC staircase waveform during the conversion process
stabilize the input analog signal during the conversion process
The weight of the LSB as a binary number is:
1
2
3
4
1
What is the difference between binary coding and binary coded decimal?
Binary coding is pure binary.
BCD is pure binary.
Binary coding has a decimal format.
BCD has no decimal format.
Binary coding is pure binary.
A single transistor can be used to build which of the following digital logic gates?
AND gates
OR gates
NOT gates
NAND gates
NOT gates
How many NAND circuits are contained in a 7400 NAND IC?
1
2
4
8
4
Exclusive-OR (XOR) logic gates can be constructed from what other logic gates?
OR gates only
AND gates and NOT gates
AND gates, OR gates, and NOT gates
OR gates and NOT gates
AND gates, OR gates, and NOT gates
Which statement below best describes a Karnaugh map?
It is simply a rearranged truth table.
The Karnaugh map eliminates the need for using NAND and NOR gates.
Variable complements can be eliminated by using Karnaugh maps.
A Karnaugh map can be used to replace Boolean rules.
It is simply a rearranged truth table.
The observation that a bubbled input OR gate is interchangeable with a bubbled output AND gate is referred to as:
DeMorgan’s second theorem
The systematic reduction of logic circuits is accomplished by:
symbolic reduction
TTL logic
using Boolean algebra
using a truth table
using Boolean algebra
How many inputs are required for a 1-of-10 BCD decoder?
4
8
10
1
4
Most demultiplexers facilitate which of the following?
decimal to hexadecimal
single input, multiple outputs
ac to dc
odd parity to even parity
single input, multiple outputs
One application of a digital multiplexer is to facilitate:
code conversion
parity checking
parallel-to-serial data conversion
data generation
parallel-to-serial data conversion
Select one of the following statements that best describes the parity method of error detection:
Parity checking is best suited for detecting single-bit errors in transmitted codes.
Parity checking is best suited for detecting double-bit errors that occur during the transmission of codes from one location to another.
Parity checking is not suitable for detecting single-bit errors in transmitted codes.
Parity checking is capable of detecting and correcting errors in transmitted codes.
Parity checking is best suited for detecting single-bit errors in transmitted codes.
A multiplexed display:
accepts data inputs from one line and passes this data to multiple output lines
uses one display to present two or more pieces of information
accepts data inputs from multiple lines and passes this data to multiple output lines
accepts data inputs from several lines and multiplexes this input data to four BCD lines
uses one display to present two or more pieces of information
When two or more inputs are active simultaneously, the process is called:
first-in, first-out processing
priority encoding
ripple blanking
priority decoding
priority encoding
Which type of decoder will select one of sixteen outputs, depending on the 4-bit binary input value?
hexadeciml
A circuit that responds to a specific set of signals to produce a related digital signal output is called a(n):
BCD matrix
display driver
encoder
decoder
encoder
Which digital system translates coded characters into a more intelligible form?
encoder
display
counter
decoder
decoder
A basic multiplexer principle can be demonstrated through the use of a:
single-pole relay
DPDT switch
rotary switch
linear stepper
rotary switch
In a BCD-to-seven-segment converter, why must a code converter be utilized?
No conversion is necessary.
to convert the 4-bit BCD into gray code
to convert the 4-bit BCD into 10-bit code
to convert the 4-bit BCD into 7-bit code
to convert the 4-bit BCD into 7-bit code
Which of the following is correct for a gated D-type flip-flop?
The Q output is either SET or RESET as soon as the D input goes HIGH or LOW.
The output complement follows the input when enabled.
Only one of the inputs can be HIGH at a time.
The output toggles if one of the inputs is held HIGH.
The Q output is either SET or RESET as soon as the D input goes HIGH or LOW.
When both inputs of a J-K flip-flop cycle, the output will:
be invalid
not change
change
toggle
not change
Latches constructed with NOR and NAND gates tend to remain in the latched condition due to which configuration feature?
asynchronous operation
low input voltages
gate impedance
cross coupling
cross coupling
The 555 timer can be used in which of the following configurations?
astable, monostable
monostable, bistable
astable, toggled
bistable, tristable
astable, monostable
A basic S-R flip-flop can be constructed by cross-coupling which basic logic gates?
AND or OR gates
XOR or XNOR gates
NOR or NAND gates
AND or NOR gates
NOR or NAND gates
One example of the use of an S-R flip-flop is as a(n):
transition pulse generator
astable oscillator
racer
switch debouncer
switch debouncer
If both inputs of an S-R NAND latch are LOW, what will happen to the output?
The output would become unpredictable.
The output will toggle.
The output will reset.
No change will occur in the output.
The output would become unpredictable.
An astable multivibrator is a circuit that:
has two stable states
is free-running
produces a continuous output signal
is free-running and produces a continuous output signal
produces a continuous output signal
.
What is another name for a one-shot?
monostable
bistable
astable
tristable
monostable
The truth table for an S-R flip-flop has how many VALID entries?
3
1
4
2
3
What is the significance of the J and K terminals on the J-K flip-flop?
There is no known significance in their designations.
The J represents “jump,” which is how the Q output reacts whenever the clock goes HIGH and the J input is also HIGH.
The letters represent the initials of Johnson and King, the co-inventors of the J-K flip-flop.
All of the other letters of the alphabet are already in use.
There is no known significance in their designations.
Which of the following describes the operation of a positive edge-triggered D-type flip-flop?
If both inputs are HIGH, the output will toggle.
The output will follow the input on the leading edge of the clock.
When both inputs are LOW, an invalid state exists.
The input is toggled into the flip-flop on the leading edge of the clock and is passed to the output on the trailing edge of the clock.
The output will follow the input on the leading edge of the clock.
What is one disadvantage of an S-R flip-flop?
It has no Enable input.
It has a RACE condition.
It has no clock input.
It has only a single output.
It has a RACE condition.
A ripple counter’s speed is limited by the propagation delay of:
each flip-flop
all flip-flops and gates
the flip-flops only with gates
only circuit gates
each flip-flop
To operate correctly, starting a ring counter requires:
clearing all the flip-flops
presetting one flip-flop and clearing all the others
clearing one flip-flop and presetting all the others
presetting all the flip-flops
presetting one flip-flop and clearing all the others
What type of register would shift a complete binary number in one bit at a time and shift all the stored bits out one bit at a time?
PIPO
SISO
SIPO
PISO
SISO
Synchronous counters eliminate the delay problems encountered with asynchronous (ripple) counters because the:
input clock pulses are applied only to the first and last stages
input clock pulses are applied only to the last stage
input clock pulses are not used to activate any of the counter stages
input clock pulses are applied simultaneously to each stage
input clock pulses are applied simultaneously to each stage
One of the major drawbacks to the use of asynchronous counters is that:
low-frequency applications are limited because of internal propagation delays
high-frequency applications are limited because of internal propagation delays
Asynchronous counters do not have major drawbacks and are suitable for use in high- and low-frequency counting applications.
Asynchronous counters do not have propagation delays, which limits their use in high-frequency applications.
high-frequency applications are limited because of internal propagation delays
Which type of device may be used to interface a parallel data format with external equipment’s serial format?
key matrix
UART
memory chip
serial-in, parallel-out
UART
When the output of a tri-state shift register is disabled, the output level is placed in a:
float state
LOW state
high impedance state
float state and a high impedance state
float state and a high impedance state
A comparison between ring and johnson counters indicates that:
a ring counter has fewer flip-flops but requires more decoding circuitry
a ring counter has an inverted feedback path
a johnson counter has more flip-flops but less decoding circuitry
a johnson counter has an inverted feedback path
a johnson counter has an inverted feedback path
A sequence of equally spaced timing pulses may be easily generated by which type of counter circuit?
shift register sequencer
clock
johnson
binary
shift register sequencer
What is meant by parallel-loading the register?
Shifting the data in all flip-flops simultaneously
Loading data in two of the flip-flops
Loading data in all four flip-flops at the same time
Momentarily disabling the synchronous SET and RESET inputs
Loading data in all four flip-flops at the same time
What is a shift register that will accept a parallel input and can shift data left or right called?
tri-state
end around
bidirectional universal
conversion
bidirectional universal