Transistor Amplifiers Flashcards
What are the two primary transistor applications
Transistor as switch (digital) and transistor as controlled source (analog)
How does analog like to use a transistor?
Analog prefers transistors in the active (or saturation) region. Then the transistor acts like a voltage controlled current source with only one independent variable (fet=vgs) following the square law
In the first order model of FET, why doesn’t Ids depend on Vds
Because if we operate the FET in active (saturated) mode then the drain is pinched off isolating the drain from the channel.
In the first order model of BJT, why doesn’t Ic depend on Vce
For the BJT in active mode the BC junction is reversed biased isolating the collector
What are the FET operating conditions to ensure active mode
Vgs = Vt + Vov, Vds > Vov & Vgd < Vtn
What are the BJT operating conditions to ensure active mode
Vbe = 0.7V, Vce > 0.3V therefore Vbc < 0.4V
What is a bias point?
It is the DC operating point of the nodes and currents in the circuit. The DC operating point represents the average value.
What is another word for bias point?
Quiescent point
What is Vov
Vgs - Vt
What is Id in terms of Vov
Id = (Kn*Vov^2)/2
Why is CS amplifier less gain than CE amplifier
CS -> Av = -IdRd/(Vov/2)
CE-> Av = -IcRd/Vt
Usually Vov/2 > Vt
What is a load line?
The effect of load resistance on the Vds vs Ids curve
What is the closure resistance
Same as Rds(on)
How should the small signal input amplitude compare to overdrive
vgs «_space;2*Vov
this keeps the distortion term down in
id=K/2(VGS+vgs-Vt)^2 (expand the square)
What is gm when small signal condition is true
Most useful-> gm=2*Id/Vov
gm=KnVov=kn’(W/L)Vov=Sqrt(2kn’)Sqrt(W/L)Sqrt(Id)
What is small signal ro
ro=|Va|/Id
What is Id (bias current) w/o channel length modulation when transistor is saturated
Id=(Kn/2)Vov^2=kn’(W/L)*Vov^2
What are types of ideal buffers?
Voltage and current
What is a voltage buffer?
Passes voltage unchanged, lowers resistance
What is a current buffer?
Passes current unchanged, raises resistance. i.e. cascode FET in common gate arrangement
What is a good way to find resistance into a node
Apply a test voltage Vx and determine Ix sourced into node: R = Vx/Ix
What is input resistance of PCB CG amp
Rin=1/gm
What is input resistance of VLSI CG amp
Rin=(1/gm)+(RL/(gmro))
RL translated to input attenuated by gmro
gm*ro will set current buffer effectiveness and therefore cascode fet effectiveness
