TAK Flashcards
Computer techniques and architecture
1
Q
before the advent of universal, electronic digital machines
A
Generation O
2
Q
computers built based on vacuum tubes
A
Generation 1
3
Q
computers built based on transistors
A
Generation 2
4
Q
computers built based on small or medium-scale TTL integrated circuits
A
Generation 3
5
Q
computers built based on high-scale integration of microprocessors
A
Generation 4
6
Q
computers built based on unconventional solutions
A
Generation 5
7
Q
it’s a law formulated in 1965 by Gordon Moore, which in its original form says thet the number of transistors in an electrical system doubles every year (in 1999, doubling would occur every 4-5 years).
A
Moore’s Law
8
Q
erasing one bit of information in an environment with temperature T requires a loss (dissipation) of energy (or heat release) of at least kT ln2, where k is the Boltzmann constant. (increasing density and clock frequency more heat)
A
Landauer’s principle
9
Q
The average distance of silicon atoms is
A
0.25 nm (density 5*10^22 /cm^3)
10
Q
For lithography ____ number of atoms along the side of the gate = 10.000
A
2.7 um (0,0027 mm/ u-micro)
11
Q
Dielectric strength of silicon dioxide
A
5 MV/cm
12
Q
Programs that use the functions of the operating system to solve problems
A
Software
13
Q
It supports computer hardware, manages system resources and provides API and drivers for application software
A
Operating system
14
Q
Describes an electronic circuit from a programmer’s perspective.
Defines a set of instructions, and visible registers.
A
Architecture
15
Q
Data buses, controllers
A
Microarchitecture
16
Q
It combines digital circuits to create functional blocks such as adders, multiplexers, etc.
A
Logical level
17
Q
Uses analog circuits to create models of digital circuits (AND gates,
NOT, etc.)
A
Digital circuit level
18
Q
Combines components into circuits with the desired properties (filters, amplifiers)
A
Analog circuit level
19
Q
Uses components such as transistors and diodes
A
Electronic level|
20
Q
Explores the world and systematizes the acquired knowledge into laws and theories that can be relatively easily studied by other people
A
Physics
21
Q
how everything is organized, how elements are connected and how it works together. (Exo-, Endo-)
A
Architecture
22
Q
- SISD (single instruction, single data)
- SIMD (single instruction, multiple data)
- MISD (multiple instructions, single data)
- MIMD (multiple instruction, multiple data)
A
Computer architecture can be classified, for example, according to the type of processor-memory connections and the way they are used:
23
Q
- CISC Architecture (complex instruction set computer)
- RISC Architecture (reduced instruction set computer)
- CCR Architecture (CISC-core-RISC: RISC as a core, but from outside this processor looks like CISC)
A
Computer architecture can also be classified, e.g. due to the list of instructions:
24
Q
slow, complicated, but good for programmers because of instructions.
A
CISC
25
fast, but reduced amount of instructions.
RISC
26
a little bit slower that RISC, but fast, and has instructions like CISC.
CCR
27
* Only one bus to connect a single memory with processor
* Common memory for both data and program code
* Allows you to auto-modify the program
Von Neumann Architecture
28
* Separate program and data memory
* Faster, but problematic data flow from a program memory to the operating memory area
Harvard Architecture
29
* One memory card, but inside it is divided into memory for
data and for application
* Two buses, data can be modified
Mixed Architecture
30
Computers can store and process information using
binary variables (0 and 1)
31
The symbols 0 and 1 usually correspond to different voltage levels, where
0 is the low state, and 1 – high.
32
A binary o and 1 sequence represent
discrete (digital) information
33
There are ranges in every circuit for high and low state
34
Signed magnitude(SM)
LSB - Least Significant Bit
MSB - Most Significant
35
Alphanumeric codes
* ASCII (7 bits, 0-127)
* Unicode (8, 16, 32 systems; all characters)
* EBCDIC (faster than unicode)
36
Conjunction
AND * ^ &&
37
Disjunction
OR + ˅ ||
38
Negation
NOT -- !
39
Annulment law
A * 0 = 0 ; A + 1 = 1
40
Identity law
A * 1 = A; A + 0 = A
41
Idempotent law
A * A = A; A + A = A
42
Commutative law
A + B = B + A; A * B = B * A
43
Complement law
A * !A = 0; A + !A = 1
44
Associative law
(A + B) + C = A + (B + C); (A * B) * C = A * (B * C)
45
Distributive law
(A + B) * C = A * C + B * C; (A * B) + C = (A + C) * (B + C)
46
Absorption law
A + (A * B) = A; A * (A + B) = A
47
Inversion law
!!A = A
48
De Morgan’s Laws
!(A * B) = !A + !B; !(A + B) = !A * !B
49
limit the current flowing in an electrical circuit, converts electrical energy into heat.
Resistors(R)
50
resistor with the possibility of changing the resistance by the user.
Potentiometer
51
small voltage high resistance, and vise-versa (used in receiver protection systems against damage caused by too high voltage)
Varistor
52
photosensitive element, the beam of light causes a decrease in its resistance (fire protection systems, temp measuring devices)
Photoresistor (F)
53
can accumulate electric charge, made of two conductors and dielectric layer
Capacitor (C)
54
conduct current in one direction and block its flow in the other
Diode (D)
55
used to rectify AC current
Rectifying diode
56
emitting the visible light and infrared range
LED
57
reacting to light
Photodiode
58
can conduct current in the opposite direction of traditional conductivity after reaching a specific voltage (breakdown voltage)
Zener diode
59
negative value of dynamic resistance after exceeding a particular value of forwarding voltage
Tunnel diode
60
are diodes that can change their capacitance (the ability to store electrical charge) when a voltage is applied to them in a certain direction
Capacitive diode
61
small capacitance of the connector, switching time about 100 ps. Can operate at frequency up to several dozen GHz (are diodes that have a very small capacitance, which means that they can switch electrical signals much faster than regular diodes)
Schottky diode
62
a three-electrode semiconductor electronic component, having the ability to amplify an electrical signal, in digital technology acts like a switch or key
Transistor (T)
63
stores energy in a magnetic field
Inductor (coil)
64
transfer AC electrical energy by induction from one electrical circuit to another
Transformer
65
are electronic devices that use a quartz crystal to generate a very precise and stable frequency. The quartz crystal vibrates at a specific frequency when an electrical current is applied to it
Crystal oscillator (X)
66
Combinational Circuit: input signal specifies output signals.
Sequential Circuit: like comb. Circ., but also depends on previous states
Digital Circuits
67
input signal specifies output signals.
Combinational Circuit
68
like comb. Circ., but also depends on previous states
Sequential Circuit
69
Using basic logical functions to create any logical function
Gates belong to comb. Circuits
Logic gates
70
Circuits with at least two inputs and most often two outputs,
Remember one bit of information.
Flip-flop
71
Built based on the flip-flops. Store digital information for a specific duration( >1 bit)
N = length of the register = number of flip-flops.
Capacity = 2^n, specifies max amount of different info that can be stored.
Registers
72
N = length of the register = number of flip-flops. Capacity =
2^n, specifies max amount of different info that can be stored.
73
Parallel entry and output of info simultaneously to all and from all entries in the register.
Simultaneous input and output of all bits.
Parallel register
74
Sequential input and output of bits.
Serial register
75
Serial input, parallel output.
Serial-Parallel
76
Parallel input, serial output.
Parallel-Serial
77
Count pulses and store the count.
Counter
78
circuit used to convert code 1 of n (ring) to another code (binary)
Convert multiple inputs to a single output code.
Encoder
79
used to convert code to code 1 of n.
Convert a single input code to multiple outputs.
Decoder
80
Code 1 of n has n inputs, with the one as highlighted state.
81
* Arithmetic Circuits: Perform binary addition.
* Types:
o Half Adder: Adds two bits, producing a sum and a carry-out.
o Full Adder: Adds three bits (two inputs and a carry-in), producing a sum and a carry-out.
o Ripple Carry Adder: Cascading full adders for multi-bit addition.
o Carry-Lookahead Adder: Faster addition by predicting carry propagation.
Adders
82
* Comparison Circuits: Determine the relative magnitude of two numbers.
* Types:
o Magnitude Comparator: Compares two numbers and outputs signals for greater than, less than, or equal to.
Comparators
83
Operation: Adds bits sequentially, one pair at a time, starting from the least significant bit (LSB).
Components:
Full adder
D flip-flop (to store the carry-out bit)
Process:
Input two bits and the previous carry-in.
The full adder produces a sum and a carry-out.
The sum is output, and the carry-out is stored in the D flip-flop.
In the next clock cycle, the next pair of bits and the stored carry-out are processed.
Advantages: Simple design.
Disadvantages: Slow operation due to sequential processing.
Serial Adder
84
Operation: Adds all bits simultaneously, using multiple full adders.
Components: Multiple full adders, one for each bit position.
Process:
All bits of the two numbers are input simultaneously.
The full adders in each position produce the sum and carry-out bits.
The carry-out from one position is fed as the carry-in to the next higher position.
Advantages: Fast operation due to parallel processing.
Disadvantages: Complex design, especially for larger numbers.
Parallel Adder
85
* Comparison Circuits: Determine the relative magnitude of two numbers.
* Types:
o Magnitude Comparator: Compares two numbers and outputs signals for greater than, less than, or equal to.
Comparators
86
* Data Selection/Distribution Circuits:
o Multiplexer: Selects one of many input signals and outputs it.
o Demultiplexer: Directs a single input signal to one of many output lines.
Multiplexers/Demultiplexers
87
Compares two numbers and outputs signals for greater than, less than, or equal to.
Magnitude Comparator
88
Selects one of many input signals and outputs it.
Multiplexer
89
Directs a single input signal to one of many output lines.
Demultiplexer
90
* Timing Circuits: Generate pulses of specific duration and frequency.
* Common Use: Clock signals for synchronous circuits.
Pulse Generators
91
* Miniaturized Electronic Circuits: Contain many transistors and other components.
* Integration Levels:
o SSI (Small-Scale Integration)
o MSI (Medium-Scale Integration)
o LSI (Large-Scale Integration)
o VLSI (Very-Large-Scale Integration)
o ULSI (Ultra-Large-Scale Integration)
Integrated Circuits (ICs)
92
o SSI (Small-Scale Integration)
o MSI (Medium-Scale Integration)
o LSI (Large-Scale Integration)
o VLSI (Very-Large-Scale Integration)
o ULSI (Ultra-Large-Scale Integration)
* SSI - Small Scale of Integration - up to 100 elements
* MSI - Medium Scale of Integration - 100 - 1000
* LSI - Large Scale of Integration - 103 - 105
* VLSI - Very Large Scale of Integration - over 105
* ULSI - Ultra Large Scale of Integration - over 106
93
Often referred to as the brain of the computer, is the central processing unit responsible for executing instructions. It performs arithmetic and logical operations based on a set of commands, essentially the program itself. Internally
The CPU
94
the CPU houses essential functional units:
Registers
Arithmetic Logic Unit (ALU)
Control Unit
95
These are high-speed, temporary storage locations that hold frequently accessed data and instructions during processing. Their size is typically a few bytes to hundreds of bytes, providing quick access for the CPU.
Registers
96
This unit performs arithmetic operations like addition, subtraction, multiplication, and division, along with logical operations like AND, OR, and NOT on binary data.
Arithmetic Logic Unit (ALU)
97
The control unit acts as the conductor of the CPU, fetching instructions from memory, decoding them, and directing other parts of the CPU to execute those instructions. It manages the flow of data within the CPU and communicates with other system components.
Control Unit
98
(Random Access Memory, 70 – 5 ns) – used to store currently processed data and the program, if we turn of a computer this information disappears
Primary Memory (RAM): Random Access Memory
99
(Read Only Memory they are slow 150 ns) – store important applications (POST – Power-On SelfTest- Teats of individual computer components, BIOS – Basic Input Output System- set of basic programs (drivers) for your computer’s devices, Bootstrap Loader – a program that searches for and loads the operating system into the operating memory)
Secondary Memory (ROM): Read-Only Memory
100
it is possible to change the program only once
PROM (Programmable Read-Only Memory)
101
the memory can be erased by the ultraviolet exposure, after which it is possible to reprogram it.
EPROM (Erasable Programmable Read-Only Memory)
102
– Erasing is done electrically (Flash memories)
EEPROM (Electrically Erasable Programmable Read-Only Memory)
103
collection of paths conducting electrical signals (Data, Address, Control)
act as data highways within the microprocessor system, enabling communication and data transfer between various components. They consist of multiple parallel lines that carry electrical signals. The number of lines determines the width of the bus, impacting the amount of data that can be transmitted simultaneously.
Buses
104
– transfer data between the processor and memory or IO chips
Data Bus = CPU buses
105
responsible for the appropriate addressing of orders and data (managed by microprocessor P)
Address Bus
106
control instructions that will determine what and how we want to do
Control Bus
107
store each bit of data in separate capacitors, requires periodic refresh
DRAM (Dynamic Random Access Memory): DRAM
108
stores data for as long as power is on, each bit is stored in a system consisting of four transistors (flip-flop) and to control transistors
SRAM (Static Random Access Memory): SRAM
109
are housed in modules for easier handling and installation. These modules connect to the motherboard's memory slots and come in various standards that have evolved over time.
Memory chips
110
(Single In-Line Memory Module) : 30-pin module, 8-bit architecture, 4 modules in the bank for 32-bit transistors, 256kB up to 4MB, 11-bit address buss, access time 70 ns.
* Connector: 30-pin
* Architecture: 8-bit
* Modules per bank: 4 (for 32-bit systems)
* Capacity: 256KB to 4MB
* Address bus: 11-bit
* Access time: 70 ns
SIMM (Single In-Line Memory Module)
111
Dual IMM): double-sided edge connector, 168 pin in SDRAM, 64-bit organization, 184 pin in DDR, 240 pin in DDR2 and DDR3, small memory 256B
* Connector: Double-sided edge connector (168-pin in SDRAM, 184-pin in DDR, 240-pin in DDR2 and DDR3)
* Architecture: 64-bit
* Capacity: Smallest is 256MB
* Address bus: Varies depending on the standard (e.g., 168-pin SDRAM has a 64-bit data bus and a 32-bit address bus)
* Access time: Varies depending on the standard (e.g., DDR3 has faster access times than SDRAM)
DIMM (Dual In-Line Memory Module)
112
– transmits two words of data at each clock beat
DDR (Double Data Rate) SDRAM
113
The first generation of DDR SDRAM.
DDR
114
Offers higher clock speeds and lower voltage requirements.
DDR2
115
Provides even higher clock speeds and lower power consumption.
DDR3
116
The current standard, offering further improvements in speed and efficiency.
DDR4
117
The latest generation, with even higher speeds and lower power consumption.
DDR5
118
A type of SDRAM that can be divided into multiple virtual channels, allowing for more efficient data transfer.
Virtual Channel SDRAM (VC-SDRAM)
119
A type of SDRAM designed for high-performance applications.
High Speed SDRAM (HS-SDRAM)
120
The fastest and smallest memory, directly accessible by the CPU.
Processor Registers
121
A small, fast memory that stores frequently accessed data and instructions. L1, L2, and L3 caches are common levels, with L1 being the fastest and smallest.
CPU Cache
122
The primary storage for running programs and data.
Main Memory (RAM)
123
Slower but larger storage devices like hard disk drives (HDDs) and solid-state drives (SSDs).
Secondary Storage
124
Memory is organized into cells, each capable of storing a fixed number of bits (usually 8 bits, or a byte).
Each memory cell has a unique address.
The address bus carries the memory address, and the data bus carries the data to be read from or written to the specified memory location.
Memory Organization and Addressing:
125
time of processing command
Access time
126
ROM
Read Only Memory they are slow 150 ns
127
Erasing is done electrically (Flash memories)
* EEPROM Electrically EPROM
128
RAM
Random Access Memory, 70 – 5 ns
129
are located on segments called banks corresponding to the width of the data bus, they can be mounted on motherboards in DIL (Dual In Line package) or on minicards (memory modules)
Memory Modules
130
– all control signals are synchronized through the clock run of the motherboard (Standards: PC-100 frequency 100MHz, Bandwidth: 100MHz x 8 B = 800 MB/s; PC-133 – Bandwidth : 133MHz x 8B =1064 MB/s )
SDRAM
131
transmits two words of data at each clock beat
DDR SDRAM (Double Data Rate SDRAM
132
Components that facilitate communication
between the different elements of the system, including buses and
controllers.
Data Transmission Devices
133
is the CPU, executing instructions from memory.
It consists of registers for data storage, an ALU for calculations,
and a control unit for coordination.
microprocessor
134
data storage
registers
135
calculations
ALU
136
coordination
control unit
137
(chip) – how many bits of information we can store in memory
Capacity
138
* Page Mode: Separate row and column addressing.
* Fast Page Mode (FPM): Simplified addressing.
* Extended Data Output (EDO): Issues next address during data read
Dynamic Memory Access Modes
139
How it works: Uses two 64-bit channels for simultaneous data transfer.
Benefits: Doubles memory bandwidth, improving system performance.
Requirement: Requires memory modules to be installed in pairs in specific slots.
Dual-Channel Architecture
140
How it works: Uses four 64-bit channels for simultaneous data transfer.
Benefits: Quadruples memory bandwidth, further enhancing system performance.
Requirement: Requires memory modules to be installed in groups of four in specific slots.
Quad-Channel Architecture
141
Improves performance with multiple memory banks.
VC-SDRAM
142
Offers faster data transfer rates.
HS-SDRAM:
143
Smallest, fastest memory.
Processor Registers
144
Faster than RAM, stores frequently accessed data.
CPU Cache (L1, L2, L3)
145
Slower than RAM, extends physical memory.
Swap File
146
ALU (Arithmetic and Logic Unit) – performs arithmetic and logical operations.
* Arithmometer
147
contains one of the operation’s arguments and is also where the result of the operation is stored.
* Accumulator
148
– there is stored information about the results of ALU operations
* Flag register
149
* Command register – is used to remember the command code retrieved from memory
* Command decoder is used to decode the command, allowing the control unit to generate the appropriate control signals.
* Control unit- ensures the correct sequence of events in the system.
Control section
150
is used to remember the command code retrieved from memory
* Command register
151
is used to decode the command, allowing the control unit to generate the appropriate control signals.
* Command decoder
152
ensures the correct sequence of events in the system.
* Control unit
153
* General purpose registers- are used to store frequently used arguments, access too which should be as quick as possible
* Stack pointer - is used to address the stack memory cell
* Program Counter – indicates where the next commands are stored in the memory
* Address register – indicates the memory cell in which the command/data byte is located or the cell to which the data byte should be written
Registry section:
154
are used to store frequently used arguments, access too which should be as quick as possible
* General purpose registers
155
is used to address the stack memory cell
* Stack pointer
156
– indicates where the next commands are stored in the memory
* Program Counter
157
– indicates the memory cell in which the command/data byte is located or the cell to which the data byte should be written
Address register
158
bus unit (Address, command, data buses)
BU
159
instruction queue in which we store instructions in particular order
Prefetch
160
– takes instructions from prefetch and decode them
IU instruction unit
161
produce an address where data or instructions are located
AU addressing unit
162
EU execution unit, FPU floating Point unit
163
management module for memory access
MMU memory management unit
164
Look-Aside – Cache attached parallel to the memory bus
Look – Backside – the cache memory is separated from the memory bus. Clock frequencies of the buses are independent of each other.
Look-Trough – through the memory bus, the cache memory is connected to the main memory.
Cache - static memory with short access time.
Cache topologies
165
Cache attached parallel to the memory bus
Look-Aside
166
– the cache memory is separated from the memory bus. Clock frequencies of the buses are independent of each other.
Look – Backside
167
through the memory bus, the cache memory is connected to the main memory.
Look-Trough
168
static memory with short access time.
Cache
169
Older technology with pins on two sides.
DIP (Dual In-Line Package)
170
Processor and cache on expansion board.
SEC (Single Edge Cartridge)
171
Pins on all four sides
* PLCC (Plastic Leaded Chip Carrier):
172
Pins arranged in a grid pattern.
* PGA (Pin Grid Array):
173
Solder balls on the bottom of the chip
BGA (Ball Grid Array):
174
Solder lands on the bottom of the chip.
* LGA (Land Grid Array):
175
Smaller, more efficient than traditional packages
TCP (Tape Carrier Package):
176
Breaks down instruction execution into stages (fetch, decode, execute,
write-back) to overlap execution of multiple instructions. Improves performance by increasing
instruction throughput.
Pipeline Processing
177
MMX, SSE, and their successors (SSE2, SSE3, SSSE3, SSE4, SSE5, AVX)
operate on integers and floating-point numbers for multimedia and scientific computing tasks
SIMD Extensions
178
Power-saving mode.
SMM
179
SIMD extensions for floating-point operations
3DNow!
180
this technology causes a fourfold increase in the frequency of data transmission, which allows for a fourfold increase in bandwidth.
Quad Pumping
181
* Multi-level branch prediction
* Analysis of data flow
* Execution in advance
Dynamic Execution
182
allows a single processor to execute two independent streams of program code at the same time
Hyper-Threading
183
laminated board with properly routed paths, surface or internally soldered electronic components, integrated circuits and sockets.
Motherboards
184
is a group of integrated circuits that control communication between the CPU, memory, and other peripherals. It consists of:
Chipset
185
Handles high-speed communication between the CPU and memory.
Northbridge (MCH)
186
Handles slower devices like USB, SATA, and sound.
Southbridge (ICH)
187
Direct Memory Access (DMA): High-speed data transfer directly between devices and memory, bypassing the CPU.
Programmed Input/Output (PIO): Slower method where the CPU directly controls data transfer between devices and memory.
Computer expansion buses
188
High-speed data transfer directly between devices and memory, bypassing the CPU.
Direct Memory Access (DMA):
189
Slower method where the CPU directly controls data transfer between devices and memory.
Programmed Input/Output (PIO):
190
o Simplex: One-way data transfer.
o Half-duplex: Two-way data transfer, but only one direction at a time.
o Full-duplex: Simultaneous two-way data transfer.
Transmission Types
* Direction:
191
o Serial: Bits are sent one by one.
o Parallel: Multiple bits are sent simultaneously
Transmission Types
* Bit Transmission:
191
o Synchronous: Uses a clock signal to synchronize data transfer.
o Asynchronous: Uses start and stop bits to define data frames.
Transmission Types
* Synchronization:
191
o ISA: Older, slower bus standard.
o AMR: For audio and modem cards.
o CNR: For communication and networking cards.
o EISA: Faster than ISA, compatible with ISA cards.
o MCA: IBM-specific bus standard.
Computer Expansion Buses
* External Buses:
191
o VLB: Early high-speed bus for graphics and other devices.
o PCI: Versatile bus for various devices.
o AGP: High-speed bus specifically for graphics cards.
o PCI-X: Faster version of PCI.
o PCI Express: Modern, high-speed serial bus.
Computer Expansion Buses
* Local Buses:
192
Older, slower bus standard.
ISA Industry Standard Architecture
193
For audio and modem cards.
AMR Audio/Modem Riser
194
For communication and networking cards.
CNR Communications and Networking Riser
195
Faster than ISA, compatible with ISA cards.
EISA Extended Industry Standard Architecture
196
IBM-specific bus standard.
MCA Micro Channel Architecture
197
Early high-speed bus for graphics and other devices.
VLB VESA Local Bus
198
Versatile bus for various devices.
PCI Peripheral Component Interconnect
199
High-speed bus specifically for graphics cards.
AGP Accelerated Graphics Port
200
Faster version of PCI.
PCI-X PCI-eXtended
201
Modern, high-speed serial bus.
PCI Express PCIe
202
bus standard for personal computers
ISA Industry Standard Architecture
203
60-pin Communications and Networking Riser
CNR
204
32-bit, locked at 10 MHz
VLB Vesa-Local Bus
MCA Micro Channel Architecture
205
communication bus used to connect devices to the motherboard
PCI Peripheral Component Interconnect
206
Connection Types:
* Parallel: Multiple bits transferred simultaneously (faster, limited distance)
o Examples: CENTRONICS (printers), EPP, ECP
* Serial: Bits transferred one by one (slower, longer distances)
o Examples: RS-232C, USB, FireWire (IEEE 1394)
207
Multiple bits transferred simultaneously (faster, limited distance)
o Examples: CENTRONICS (printers), EPP, ECP
Parallel
208
CENTRONICS (printers), EPP, ECP
Parallel
209
Bits transferred one by one (slower, longer distances)
o Examples: RS-232C, USB, FireWire (IEEE 1394)
Serial
210
RS-232C, USB, FireWire (IEEE 1394)
Serial
211
Serial communication standard for connecting devices (up to 15m, 1 Mbps)
* RS-232C
212
Universal Serial Bus for various devices (multiple versions with increasing speeds: 1.1, 2.0, 3.0, etc.) - Plug and Play, Hot Plugging
* USB
213
High-speed serial connection for data transfer (up to 1600 Mbps)
FireWire (IEEE 1394):
214
* Wireless:
o IrDA: Infrared for temporary networks (up to 30 Mbps)
o Bluetooth: Short-range communication (various versions with increasing speeds)
o Wi-Fi: Wireless networking standard (multiple versions with increasing speeds: 802.11a/b/g/n/ac/ax)
215
Infrared for temporary networks (up to 30 Mbps)
IrDA
216
Short-range communication (various versions with increasing speeds)
o Bluetooth
217
Wireless networking standard (multiple versions with increasing speeds: 802.11a/b/g/n/ac/ax)
Wi-Fi:
218
Communication via satellites
* Satellite Link
219
Transmission and reception of radio signals
* Radio Communication Station
220
Microwave transmission (bandwidth from Mbps to Gbps) 30 km max distance
* Line of Sight Radio
221
Used in Ethernet networks, antennas, etc
Coaxial Cable
222
Used in IT and phone networks (various types)
* Twisted Pair Cable
223
High-throughput data transfer using light (up to 100 Gbps
Optical Fiber:
224
Centronics designed for printers
EPP Enhanced Parallel Port: 8-bit, up to 2 Mbps, cable up to 2m
ECP Extended Capabilities Port: 8-bit, up to 2 Mbps, cable up to 2m, high performed printers
225
8-bit, up to 2 Mbps, cable up to 2m
EPP Enhanced Parallel Port
226
8-bit, up to 2 Mbps, cable up to 2m, high performed printers
ECP Extended Capabilities Port:
227
up to 15m at speeds up to 1 Mb/s
* DTE Data Terminal Equipment – Data transmission and device
* DCE Data Communication Equipment – data communication
RS-232C
228
IrDA Infrared Data Association – wireless serial transmission standard in infrared
Wi-Fi Wireless Fidelity
Satellite link – type of radio telecommunications link
USB Universal Serial Bus
229
Quantum objects can be in multiple states simultaneously (unlike classical bits which are 0 or 1).
* Superposition
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The act of measuring a quantum object collapses its superposition into a single state.
* Measurement/Observer Effect
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Two quantum objects can be linked, where measuring one instantly affects the other, regardless of distance.
Quantum Entanglement
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The basic unit of information in a quantum computer, existing as a superposition of 0 and 1.
* Qubits
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The power of a quantum computer grows exponentially with the number of qubits.
* Qubit Capacity
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Operations performed on qubits to manipulate their states
* Quantum Gates
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Specific procedures designed for quantum computers to solve problems.
* Quantum Algorithms
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Challenges include reversible operations and the no-cloning theorem.
Limitations
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Different types of quantum computers like
annealers, NISQ (noisy intermediate-scale), and fully
error-corrected models.
* Implementations
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Maintaining the superposition state for accurate
calculations.
* Coherence
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DiVincenzo's criteria for building
a functional quantum computer.
* Physical Implementation
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Layered structure with control processors, measurement systems, and qubit technologies.
Modern Architecture
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This gate flips the state of a qubit.
It's equivalent to the NOT gate in classical computing.
* Pauli-X (X):
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This gate performs a rotation around the
Y-axis of the Bloch sphere.
* Pauli-Y (Y):
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This gate flips the phase of a qubit in
the |1⟩ state.
* Pauli-Z (Z):
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* Creates a superposition of |0⟩ and |1⟩ states. It's crucial
for many quantum algorithms.
Hadamard Gate (H)
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* These gates introduce a phase shift to the qubit state,
which can be useful for certain quantum operations
Phase Gates (S, P, T)
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This gate flips the
target qubit only if the control qubit is in the |1⟩ state.
* Controlled-NOT (CNOT, CX):
247
This gate applies a Z-gate to the
target qubit only if the control qubit is in the |1⟩ state.
* Controlled-Z (CZ):
248
* Swaps the states of two qubits.
SWAP Gate
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* This is a three-qubit gate. It flips the target qubit only if both control qubits are in the |1⟩ state.
Toffoli Gate (CCNOT, CCX, TOFF)
250
* Each gate can be represented by a 2x2 or 4x4 matrix (depending on the number of qubits it acts upon).
* These gates are fundamental building blocks for constructing more complex quantum circuits and algorithms.
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utilize magnetic properties to store and retrieve data. They've been a cornerstone of data storage for decades, evolving from floppy disks to hard disk drives (HDDs).
Magnetic storage devices
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: Circular disks coated with a magnetic material.
* Platters
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Electromagnets that read and write data to the platters.
* Heads
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Spins the platters at high speeds.( rotational speed 3600, 5400, 7200, 10000, 15000rpm (revolutions per minute), the most important requirement for the drive system is speed stability)
* Spindle Motor(Positioning System):
255
Positions the heads over specific tracks on the platters.
Actuator Arm
256
Manages the entire operation of the HDD.
* Controller
257
: The circuitry that controls the drive's operations.
* Electronic Components Package
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Components that allow the drive to be configured and connected to a system.
* Configuration Elements
259
A filter that prevents dust and other particles from entering the drive and damaging the sensitive components.
Air Filter:
260
A simple method where magnetic polarity changes to represent 1s.
* NRZ1
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Frequency Modulation, where magnetic polarity changes at the beginning of each bit cell and in the middle of cells representing 1s.
* FM
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Modified Frequency Modulation, a more efficient technique that reduces the number of magnetic transitions.
MFM
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Run Length Limited, a complex method that optimizes data density by limiting the number of consecutive 0s.
* RLL
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relies on the cooperation of two or more hard drives to provide additional capabilities not achievable with single drive
RAID Redundant Array of Independent Disks
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The saved file is divided into fixed size data stripes, which are then written alternately on disk.
RAID 0 (Stripping)
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Data is written to both disks simultaneously. The disk containing the copy is hidden from the user.
RAID 1 (Mirroring)
267
cloning occurs at the level of individual physical disks, not logical
RAID 1 + 0
268
an array implemented as RAID 1, whose elements are RAID 0 arrays
RAID 0 + 1
269
each subsequent bit on a different disk, need of additional disk for Hamming code (error correction)
RAID 2
270
data is saved on all disks simultaneously, but they are accompanied by an ongoing parity bit, which held on a separate disk dedicated to this purpose
RAID 3
271
very similar to RAID 3 with difference that data is divided into block (checksums)
RAID 4
272
similar to RAID 4 with the difference that parity bits are not written on specially separated disk but are scattered throughout the entire structure of the array
RAID 5
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similar to RAID 5, however additional error correction code (ecc) have been added, min. number of disks 4
RAID 6
274
involves connecting to two physical disks so that part of the disk works as RAID 0 and another as RAID 1
RAID MATRIX
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LTO – Linear Tape-Open , AIT – Advanced Intelligent Tape, SLR- Scalable Linear Recording
276
Older, low-capacity storage media.
* Floppy Disks
277
Removable storage media with higher capacity than floppy disks.
* Zip Disks
278
Used for long-term archival storage.
* Magnetic Tape
