Structure and Function of the Processor

Question 1

What does the Arithmetic Logic unit do

Answer 1

The ALU completes all the arithmetical and logical operations

Question 2

What is the Control Unit

Answer 2

A part of the processor which directs operations inside the CPU

Question 3

What are registers

Answer 3

Small memory cells that operate at high speeds

Question 4

What does the Program Counter (PC) do

Answer 4

Holds the address of the next instruction

Question 5

In which part of the CPU do all calculations take place

Answer 5

The Arithmetic and Logic Unit (ALU)

Question 6

Where are intermediate arithmetic and logic results stored

Answer 6

In the accumulator (ACC)

Question 7

What does the Memory Address Register do

Answer 7

Holds the address of a location that is to be read from or written to

Question 8

What does the Memory Data Register do

Answer 8

Temporarily stores the data that has just been read from or the data needs to be written

Question 9

What does the Current Instruction Register do

Answer 9

Holds the current instruction divided up into opcode and operand

Question 10

What is a Bus

Answer 10

A set of parallel wires connecting two or more components together

Question 11

What is the system bus

Answer 11

The collection of the data bus, address bus, and control bus

Question 12

What is the width of a bus

Answer 12

The number of parallel wires it has

Question 13

What is the data bus

Answer 13

A bidirectional bus used to transport data and instructions between components

Question 14

What is the control bus

Answer 14

The bi-directional bus used to transmit control signals between internal and external components

Question 15

What is the address bus used for

Answer 15

Used to transmit the memory address specifying where data is to be sent from or retrieved from

Question 16

What does adding a wire to the address bus do to the number of addressable locations

Answer 16

It doubles the number of addressable locations

Question 17

What does the Bus Request indicate

Answer 17

Indicates a device is requesting access to the data bus

Question 18

What does Bus Grant indicate

Answer 18

Indicates the CPU has granted access to the data bus

Question 19

What does memory write do

Answer 19

Causes the data on the data bus to be
written into the addressed location

Question 20

What does memory read do

Answer 20

Causes the data from the addressed location to be placed onto the data bus

Question 21

What does the interrupt request control signal indicate

Answer 21

Indicates that a device is requesting access to the CPU

Question 22

What is the clock control signal used for

Answer 22

It is used to synchronise instructions

Question 23

What is Assembly Language

Answer 23

Assembly Language is a programming language where mnemonics are used to represent instructions

Question 24

What is opcode

Answer 24

Opcode is used to determine the type of instruction and what hardware to use to execute it

Question 25

What is the operand

Answer 25

The operand is the address of where the operation is performed

Question 26

What occurs during the fetch phase

Answer 26

• The address from the PC is copied to the MAR
• Instruction held at that address is copied to the MDR by the data bus, simultaneously the contents of the PC is increased by 1
• The value of the MDR is copied to the CIR

Question 27

What occurs during the decode phase

Answer 27

The contents of the CIR is split into operand and opcode

Question 28

What occurs during the execute phase

Answer 28

The opcode is executed on the data

Question 29

What is the clock speed

Answer 29

The number of clock cycles completed per second

Question 30

What is cache memory

Answer 30

Cache memory is the CPU’s onboard memory which can be accessed a lot faster than main memory

Question 31

What is pipelining

Answer 31

The process of completing the fetch,
decode and execute of three separate
files simultaneously

Question 32

What is Von Neumann architecture

Answer 32

Architecture in which there is a single shared memory and shared data bus for both data and instructions

Question 33

What is Harvard architecture

Answer 33

Architecture in which there is two separate memory and data buses for data and instructions

Question 34

What is contemporary processing

Answer 34

Processing in which Von Neumann architecture is used for main memory. Cache uses Harvard architecture, divided into instruction cache and data cache