SSD Theory Flashcards
List some general characteristics of solid-state storage devices
There are no mechanical or moving parts like HDD
Retain information despite power loss unlike typical RAM
Uses traditional hard disk drive interfaces and form factors
What is the relationship between the amount of bits a cell can store, the voltage, and the performance and durability?
In flash memory, the cells are the fundamental storage units that hold bits of data. Flash memory cells can be broadly categorized based on the number of bits they store:
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Single-Level Cell (SLC):
- Stores 1 bit per cell.
- Advantages: Higher speed, greater endurance (higher number of write/erase cycles), and better reliability.
- Disadvantages: Lower storage density and higher cost per bit.
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Multi-Level Cell (MLC):
- Stores 2 bits per cell.
- Advantages: Higher storage density and lower cost per bit compared to SLC.
- Disadvantages: Lower speed, reduced endurance, and decreased reliability compared to SLC.
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Triple-Level Cell (TLC):
- Stores 3 bits per cell.
- Advantages: Even higher storage density and lower cost per bit compared to MLC.
- Disadvantages: Further reduced speed, endurance, and reliability compared to MLC.
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Quad-Level Cell (QLC):
- Stores 4 bits per cell.
- Advantages: Maximum storage density and lowest cost per bit among the common types.
- Disadvantages: Lowest speed, endurance, and reliability among the common types.
These flash memory cells work by trapping electrons in a floating gate transistor to represent different voltage levels corresponding to different bit values. The more bits a cell stores, the more precise the voltage levels must be, leading to trade-offs in performance and durability.
How is a NAND flash organized
NAND flash memory is organized in a hierarchical structure to optimize storage density and performance. The main components of this organization include cells, strings, pages, blocks, planes, and the overall memory array. Here’s a detailed breakdown:
- Cell: The basic unit of NAND flash memory, storing one or more bits of data (SLC, MLC, TLC, QLC).
- String: A series of cells connected in a sequence. Each string has a bit line on one end and a source line on the other.
- Page: A group of cells that can be read or programmed (written) simultaneously. Pages are the smallest unit of data that can be read or written.
- Size: Pages typically range from 2 KB to 16 KB.
- Block: A larger unit composed of multiple pages. Blocks are the smallest unit that can be erased in NAND flash memory.
- Size: A block usually contains 64 to 256 pages.
- Plane: A collection of blocks. Multiple planes are organized within a NAND flash die to allow parallel operations and improve performance.
- Size: Each plane may contain several thousand blocks.
To illustrate, consider a typical NAND flash memory organization:
- Cell Level: Each cell stores bits of data.
- String Level: 32 or 64 cells connected in series form a string.
- Page Level: 128 strings grouped together form a page (e.g., 8 KB per page).
- Block Level: 128 pages grouped together form a block (e.g., 1 MB per block).
What is the smallest units that can be erased in SSD
Blocks
What is the smallest unit that can be read/written in SSD’s
Pages
What are the possible stages a page can be?
Empty (or erased): do not contain data
Dirty (or invalid): Data is no longer in use
In use (or valid): things that can be actually read
What is right amplification and what are its impacts on the work of the SSD?
Write amplification is a phenomenon that occurs in solid-state drives (SSDs) where the amount of data physically written to the flash memory is greater than the amount of data logically written by the host system. This issue arises due to the nature of how SSDs manage data at the block and page level, impacting the drive’s performance and lifespan.
Impact on Write Amplification**:
- Write amplification is the ratio of the actual amount of data written to the NAND flash memory to the amount of data intended to be written by the host.
- For example, if 1 GB of data is written by the host, but 3 GB of writes are performed internally by the SSD due to garbage collection, the write amplification factor is 3.
Detail the causes of the right amplification in SSD
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Flash Memory Structure:
- SSDs use NAND flash memory, which is organized into blocks and pages.
- Data can be written to pages, but a page must be erased before it can be rewritten, and erasing can only be done at the block level.
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Data Management:
- When data is written to an SSD, it is first written to a clean (erased) page.
- If the same data needs to be updated or rewritten, it cannot overwrite the old data in the same page. Instead, the new data is written to a new page, and the old page is marked as invalid.
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Garbage Collection:
- Over time, as more data is written and updated, the SSD accumulates invalid pages.
- To reclaim space, the SSD performs garbage collection, where valid data from partially filled blocks is copied to new locations, and the old blocks are erased.
- This process can involve copying more data than was originally written, leading to additional write operations.
What are possible mitigation techniques for the write amplifications in SSD
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Mitigation Techniques:
- Over-Provisioning: Allocating extra space that is not visible to the host to provide more room for garbage collection and wear leveling.
- Efficient Garbage Collection Algorithms: Designing algorithms to minimize the amount of data movement during garbage collection.
- Wear Leveling: Distributing write and erase cycles evenly across the memory cells to prevent certain cells from wearing out prematurely.
- TRIM Command: Allowing the operating system to inform the SSD about blocks of data that are no longer in use, helping the SSD manage free space more effectively.
Understanding and mitigating write amplification is crucial for optimizing SSD performance and longevity.
What are the consequences of writing amplifications for the SSD performance and durability?
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Consequences:
- Performance: Increased write operations can slow down the SSD as it spends more time on internal management tasks.
- Endurance: Flash memory cells have a limited number of write/erase cycles. Higher write amplification accelerates wear, reducing the SSD’s lifespan
Hypothetical SSD:
§ Page Size: 4KB
§ Block Size: 5 Pages
§ Drive Size: 1 Block
§ Read Speed: 2 KB/s
§ Write Speed: 1 KB/s
Op 1. Lets write a 4Kb text file to the brand new SSD
Op 2. Now lets write a 8Kb pic file to the almost brand new SSD, thankfully there’s space
Op 3. Finally, let’s write a 12kb pic to the SSD (txt file in the first page is not more needed)
Writing times:
Op 1: 4 seconds!
Op 2: 8 seconds
Op 3: 24 seconds
Solution:
Step 1: Read block into cache
Step 2: Delete page from cache
Step 3: Write new pic into cache
Step 4: ERASE the old block on SSD Step 5: Write cache to SSD
The OS only thought it was writing 12 KBs of data when in fact the SSD had to read 8 KBs (2 KB/s) and then write 20KBs (1 KB/s), the entire block.
What is the FTL component in an SSD
The Flash Translation Layer (FTL) is a critical component in a solid-state drive (SSD) that manages the complexities of flash memory. Flash memory has specific characteristics, such as the inability to overwrite existing data without an erase operation and the requirement to erase data in large blocks. The FTL serves as an abstraction layer between the host system (which views the SSD as a simple block device like a hard drive) and the underlying NAND flash memory, handling the intricacies of data management.
What are the functions of the FTL component?
- Logical to Physical Address Mapping:
• The FTL maintains a mapping table that translates logical block addresses (LBAs), which the host system uses to read and write data, to physical addresses in the NAND flash memory.
• This mapping allows the SSD to present itself as a traditional block storage device to the host.- Wear Leveling:
• Flash memory cells have a limited number of write/erase cycles. Wear leveling algorithms in the FTL ensure that write and erase operations are distributed evenly across all memory cells, preventing premature wear of specific cells.
• There are two types of wear leveling: dynamic and static. Dynamic wear leveling focuses on recently written data, while static wear leveling also relocates infrequently accessed data to ensure even wear. - Garbage Collection:
• When data is updated or deleted, invalid pages accumulate in the flash memory. The FTL includes garbage collection algorithms that consolidate valid data from partially filled blocks and erase blocks containing invalid data, freeing up space for future writes.
• Efficient garbage collection minimizes write amplification, improving performance and extending the lifespan of the SSD. - TRIM Command Support:
• The FTL supports the TRIM command, which allows the operating system to inform the SSD about which blocks of data are no longer in use.
• This helps the FTL manage free space more efficiently, improving performance and reducing write amplification.
- Wear Leveling:
What is garbage collection and the two possible different cases it faces
It is the process of finding garbage blocks and reclaiming them
It can process a full garbage block, which is a simpler alternative, or, in a more complex case, partial blocks, in this case he needs to find a suitable partial block copy no garbage pages reclaim ((erase)) the entire block for writing
Assume that a page size is 4 Kbyte and a block consists of four pages.
• Write(pageNumber, value)
§ Write(100, a1)
§ Write(101, a2)
§ Write(2000, b1)
§ Write(2001, b2)
§ Write(100, c1)
§ Write(101, c2)
• The initial state is with all pages marked INVALID(i)
What are the steps taken by the SSD?
See the picture 1S in the Comp Infra album