SLR17 Internal computer architecture Flashcards
Processor
“Often known as a Central Processing Unit (CPU), it is the main part of the computer, consisting of the registers, ALU and control unit.”
Main memory
“Volatile main memory with fast access times. Also known as Random-Access Memory, RAM can be used in main areas of computing and computing storage. RAM typically can be thought of as containing the operating system, programs in use and the data those programs are using while the computer is running.”
Address bus
“The part of the bus which carries identification about where the data is being sent.”
Data bus
“The part of the bus which carries the actual information.”
Control bus
“This bus carries command and control signals to and from every other component of a computer.”
I/O controllers
“Input/output controllers receive input and output requests from the central processor and then send device-specific control signals to the device they control. They also manage the data flow to and from the device; this frees the central processor from controlling each device.”
Von Neumann architecture
“Traditional computer architecture that forms the basis of most digital computer systems. A single control unit manages program control flow following a linear sequence of ‘fetch-decode-execute.’”
Harvard architecture
“A computer architecture with physically separate storage and signal pathways for instructions and data. These early machines had data storage entirely contained within the central processing unit and provided no access to the instruction storage as data.”
Arithmetic Logic Unit
“The part of the CPU where data is processed and manipulated. This processing and manipulation normally consist of arithmetic operations or logical comparisons, allowing a program to make decisions.”
Control unit
“The part of the CPU that manages the execution of instructions. The control unit fetches each instruction in sequence and decodes and synchronises it before executing it by sending control signals to other parts of the computer.”
Clock
“Measured in hertz, the clock speed is the frequency at which the internal clock generates pulses. The higher the clock rate, the faster the computer may work. The ‘clock’ is the electronic unit that synchronises related components by generating pulses at a constant rate.”
General-purpose register
“Tiny areas of extremely fast memory located in the CPU normally designed for a specific purpose, where data or control information is stored temporarily. A CPU will usually have many general purposes registers for storing temporary data while instructions are being carried out.”
Program Counter
“A register in the control unit which holds the address of the next instruction to be executed.”
Current Instruction Register
“A register in the control unit that stores the address of the next instruction currently being executed and decoded.”
Memory Address Register
“A register in the CPU that stores the address of the memory location currently in use. In the fetch phase, this would be the address of the instruction being loaded; in the execute phase, it would be the address of the data being used.”
Memory Buffer Register
“Sometimes known as the Memory Data Register (MDR) is a register in the CPU that stores data being transferred to and from the immediate-access store. It acts as a buffer, allowing the central processor and memory unit to act independently without being affected by minor differences in operation. A data item will be copied to the MDR ready for use at the next clock pulse when it can either be used by the central processor or be stored in main memory.”
Status register
“Contains information about the state of the processor. Individual bits are implicitly or explicitly read and written by the machine code instructions executing on the processor.”
Fetch-decode-execute cycle
“The complete process of retrieving an instruction from the store, decoding it and carrying it out. Also known as the instruction cycle.”
Processor instruction set
“A group of commands for a CPU in machine language. The term can refer to all possible instructions for a CPU or a subset of instructions to enhance its performance in certain situations.”
Opcode
“Abbreviation of operation code. It is the portion of a machine instruction which specifies the operation to be performed.”
Operand
“The portion of a machine instruction that specifies the data to be operated on or manipulated by the opcode.”
Immediate addressing
“Uses the data in the address field; not as an address but a constant required by the program. An example is a routine counting to 10, which may have the constant ‘10’ supplied in the address field of an instruction. The address field cannot hold numbers as large as those that can be stored as data in a memory location because space must be left for the operation code field. This is a particularly convenient method of loading constants into the accumulator.”
Direct addressing
“Uses the data in the address field without alteration; this is the simplest method of addressing and the most common.”
Mnemonic
“In assembly language, a mnemonic is an abbreviation for an operation. It is entered in the operation code (opcode) field of each assembler program instruction.”
Bitwise shift
“An operation that moves the bits held in the shift register to either the left or the right. There are three different types of shift: arithmetic shift, logical shift and cyclic shift. They are distinguished by what happens to the bits shifted out of the register and what is moved in to fill the vacant space.”
Interrupt
“A signal generated by a source such as an input or output device or a systems software routine that causes a break in the execution of the current routine. Control passes to another routine in such a way that the original routine can be resumed after the interrupt.”
Interrupt Service Routine
“A software routine that hardware invokes in response to an interrupt. ISRs examine an interrupt and determine how to handle it.”
Multiple cores
“A part of a multi-core processor. A multi-core processor is a single component with two or more independent actual CPUs, which are the units responsibly for the fetch-decode-execute cycle.”
Cache memory
“A part of the main store between the central processor and the rest of the memory. It has extremely fast access, so sections of a program and its associated data are copied there to take advantage of its short fetch cycle.”
Clock speed
“Measured in hertz, the clock speed is the frequency at which the internal clock generates pulses. The higher the clock rate, the faster the computer may work. The ‘clock’ is the electronic unit that synchronises related components by generating pulses at a constant rate.”
Word length
“The number of bits in a word.”
Address bus width
“Determines the amount of memory a system can address. For example, a system with a 32-bit address bus can address 232 (4,294,967,296) memory locations. If each memory location holds one byte, the addressable memory space is 4 GB.”
Data bus width
“The width of the data bus is directly related to the largest number that the bus can carry. For example, an 8-bit bus can represent 2 to the power of 8 unique values; this equates to the numbers 0 to 255. A 16-bit bus can carry the values 0 to 65535, and so on.”
“Often known as a Central Processing Unit (CPU), it is the main part of the computer, consisting of the registers, ALU and control unit.”
Processor
“Volatile main memory with fast access times. Also known as Random-Access Memory, RAM can be used in main areas of computing and computing storage. RAM typically can be thought of as containing the operating system, programs in use and the data those programs are using while the computer is running.”
Main memory
“The part of the bus which carries identification about where the data is being sent.”
Address bus
“The part of the bus which carries the actual information.”
Data bus
“This bus carries command and control signals to and from every other component of a computer.”
Control bus
“Input/output controllers receive input and output requests from the central processor and then send device-specific control signals to the device they control. They also manage the data flow to and from the device; this frees the central processor from controlling each device.”
I/O controllers
“Traditional computer architecture that forms the basis of most digital computer systems. A single control unit manages program control flow following a linear sequence of ‘fetch-decode-execute.’”
Von Neumann architecture
“A computer architecture with physically separate storage and signal pathways for instructions and data. These early machines had data storage entirely contained within the central processing unit and provided no access to the instruction storage as data.”
Harvard architecture
“The part of the CPU where data is processed and manipulated. This processing and manipulation normally consist of arithmetic operations or logical comparisons, allowing a program to make decisions.”
Arithmetic Logic Unit
“The part of the CPU that manages the execution of instructions. The control unit fetches each instruction in sequence and decodes and synchronises it before executing it by sending control signals to other parts of the computer.”
Control unit
“Measured in hertz, the clock speed is the frequency at which the internal clock generates pulses. The higher the clock rate, the faster the computer may work. The ‘clock’ is the electronic unit that synchronises related components by generating pulses at a constant rate.”
Clock
“Tiny areas of extremely fast memory located in the CPU normally designed for a specific purpose, where data or control information is stored temporarily. A CPU will usually have many general purposes registers for storing temporary data while instructions are being carried out.”
General-purpose register
“A register in the control unit which holds the address of the next instruction to be executed.”
Program Counter
“A register in the control unit that stores the address of the next instruction currently being executed and decoded.”
Current Instruction Register
“A register in the CPU that stores the address of the memory location currently in use. In the fetch phase, this would be the address of the instruction being loaded; in the execute phase, it would be the address of the data being used.”
Memory Address Register
“Sometimes known as the Memory Data Register (MDR) is a register in the CPU that stores data being transferred to and from the immediate-access store. It acts as a buffer, allowing the central processor and memory unit to act independently without being affected by minor differences in operation. A data item will be copied to the MDR ready for use at the next clock pulse when it can either be used by the central processor or be stored in main memory.”
Memory Buffer Register
“Contains information about the state of the processor. Individual bits are implicitly or explicitly read and written by the machine code instructions executing on the processor.”
Status register
“The complete process of retrieving an instruction from the store, decoding it and carrying it out. Also known as the instruction cycle.”
Fetch-decode-execute cycle
“A group of commands for a CPU in machine language. The term can refer to all possible instructions for a CPU or a subset of instructions to enhance its performance in certain situations.”
Processor instruction set
“Abbreviation of operation code. It is the portion of a machine instruction which specifies the operation to be performed.”
Opcode
“The portion of a machine instruction that specifies the data to be operated on or manipulated by the opcode.”
Operand
“Uses the data in the address field; not as an address but a constant required by the program. An example is a routine counting to 10, which may have the constant ‘10’ supplied in the address field of an instruction. The address field cannot hold numbers as large as those that can be stored as data in a memory location because space must be left for the operation code field. This is a particularly convenient method of loading constants into the accumulator.”
Immediate addressing
“Uses the data in the address field without alteration; this is the simplest method of addressing and the most common.”
Direct addressing
“In assembly language, a mnemonic is an abbreviation for an operation. It is entered in the operation code (opcode) field of each assembler program instruction.”
Mnemonic
“An operation that moves the bits held in the shift register to either the left or the right. There are three different types of shift: arithmetic shift, logical shift and cyclic shift. They are distinguished by what happens to the bits shifted out of the register and what is moved in to fill the vacant space.”
Bitwise shift
“A signal generated by a source such as an input or output device or a systems software routine that causes a break in the execution of the current routine. Control passes to another routine in such a way that the original routine can be resumed after the interrupt.”
Interrupt
“A software routine that hardware invokes in response to an interrupt. ISRs examine an interrupt and determine how to handle it.”
Interrupt Service Routine
“A part of a multi-core processor. A multi-core processor is a single component with two or more independent actual CPUs, which are the units responsibly for the fetch-decode-execute cycle.”
Multiple cores
“A part of the main store between the central processor and the rest of the memory. It has extremely fast access, so sections of a program and its associated data are copied there to take advantage of its short fetch cycle.”
Cache memory
“Measured in hertz, the clock speed is the frequency at which the internal clock generates pulses. The higher the clock rate, the faster the computer may work. The ‘clock’ is the electronic unit that synchronises related components by generating pulses at a constant rate.”
Clock speed
“The number of bits in a word.”
Word length
“Determines the amount of memory a system can address. For example, a system with a 32-bit address bus can address 232 (4,294,967,296) memory locations. If each memory location holds one byte, the addressable memory space is 4 GB.”
Address bus width
“The width of the data bus is directly related to the largest number that the bus can carry. For example, an 8-bit bus can represent 2 to the power of 8 unique values; this equates to the numbers 0 to 255. A 16-bit bus can carry the values 0 to 65535, and so on.”
Data bus width
