SLR 1/The CPU Flashcards

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1
Q

What are the 5 register in the CPU

A

Program Counter (PC)
Accumulator (ACC)
Memory Address Register (MAR)
Memory Data Register (MDR)
Current Instruction Register (CIR)

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2
Q

What are 3 buses in the CPU

A

Data bus
Address Bus
Control Bus

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3
Q

What does The Program Counter (PC) do?

A

The PC holds the address of the next instruction to be executed. Address held in the program counter is copied to the MAR.

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4
Q

What does the Accumulator (ACC) do?

A

The ACC holds the results of the calculations performed by the ALU. It also holds data that will be used in a calculation. It general purpose.

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5
Q

What does the Memory Address Register (MAR) do?

A

The MAR holds the memory address of the data/instruction read from or written to memory (RAM/ROM). Sends the address down the address bus to RAM.

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6
Q

What does the Memory Data Register (MDR) do?

A

The MDR holds the data temporarily. It is known as the “Gateway to the processor”. All data must go down the data bus and pass the MDR. holds the contents that where within the MAR.

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7
Q

What does the Current Instruction Register (CIR) do?

A

The CIR holds the instruction that the processor is executing. Contents of the MDR copied to the CIR. This contains the operand and the opcode. The operand will be either an address or data to be processed. The opcode will be the specific instruction to be executed such as ADD. For example LDA 1000

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8
Q

Other than the 5 registers, buses and cache, what are the two other components of the CPU?

A

Arithmetic Logic Unit (ALU)
Control Unit (CU)

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9
Q

What does the Arithmetic Logic Unit (ALU) do?

A

The ALU performs arithmetic calculation such as addition and logical comparisons such as less than. This allows the program to make decisions

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10
Q

What does the Control Unit (CU) do?

A

The control unit manages the execution of instructions in the CPU. it is responsible for fetching, decoding and executing each instruction by sending control signals to the other components of the CPU. Its stores the instructions results in memory and sends signals on the control bus.

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11
Q

Define registers.

A

small amounts of fast memory on the CPU. Each register holds just one value.

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12
Q

Fetch stage in the FDE cycle

A

1.The PC holds the address of the next instruction.
2.This address is copied into the MAR.​
3. Address sent along address bus to RAM where it waits for signal from control bus
4. CU sends the signal, once received the contents in the RAM are sent on the data bus to the MDR
5. Data copied from MDR to CIR. Instruction is fetched
6. PC is incremented so it can get the next instruction

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13
Q

Decode stage of the FDE cycle

A

7.Instruction in CIR is now decoded by the decode unit.
8.Instruction made of the Opcode and Operand. Opcode is what we need to do and Operand is what we are going to do it to.

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14
Q

Execution stage of the FDE cycle

A
  1. Sends the decoded address to the MAR.
  2. This goes down the address bus into RAM.
  3. Control Unit sends a read signal along the control bus to RAM
  4. Contents are read and sent through the data bus to the MDR
    13.Contents of MDR are copied to Accumulator and the cycle is complete.
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15
Q

List the 6 factors that affect the CPUs performance and explain how?

A
  1. Number of Cores - multiple cores on a single chip – this means more than one instruction can be executed at a time.
  2. Size of the Registers - The size of the registers determines the amount of data with which the computer can work at a one time.
  3. RAM - The more RAM a PC has, the more program instructions and data can be held in memory, which is faster than disk storage.

4.Clock Speed - A single “tick” of the clock is the time required to turn a transistor off and back on – this is called a clock cycle. Clock cycles are measured in hertz (Hz), a measure of cycles per second. The faster a PC’s clock runs, the more instructions the PC can execute per second.​

  1. Data bus - The data bus width determines how many bits can be transmitted between the CPU and other devices. The wider the data bus, the more bits can be transmitted at once, reducing the number of fetches
  2. Cache - Cache is made of very high-speed components and reduces the number of fetches for both instructions and data. Recently executed instructions – for example, in a loop – will be stored in the cache.​
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16
Q

Define Von Neumann Architecture

A

-Shared memory for instructions and data
-A single control unit
-One instruction at a time
-Register used as fast access

17
Q

Define Harvard Architecture

A

-Instructions and data stored in separate memory
-Each has its own Bus
-Reading and writing data can be done at the same time as fetching
-Used for RIC

18
Q

Explain the Cache Levels

A

Level 1 - Built directly in each core of the CPU
level 2 - Located outside of the core
Level 3 - Shared by all cores
Main Memory - If all cache is in use it will then use main memory RAM

19
Q

Address Bus

A

Carries Addresses that identify where data is being sent from. One way from MAR to RAM

20
Q

Data Bus

A

Carries the data being sent. Binary 1s and 0s. Both way from MDR to RAM and RAM to MDR.

21
Q

Control Bus

A

Carries control signals to and from the CPU. Both ways from CU to RAM and RAM to CU

22
Q

Pipeling

A

As one instruction is executing, another is decoding and another is fetching. this helps improves performance and makes use of registers at all times

23
Q

Instruction Pipelining

A

Consist of the various stages an instruction must move through the processor

24
Q

Arithmetic Pipelining

A

Consist of the parts of an arithmetic operation that can be broken down and overlapped as they are carried out

25
Q

Why would a program with a lot of branching not be using Pipelining as efficiently

A

Because the program is jumping around a lot , the pipeline will keep getting flushed.

26
Q

Contemporary Architecture

A

-More modern
-Uses SIMD (Single Instruction Multiple Data) A form of Parellel processing where a processor carries out a single instruction on multiple data items at the same time.
-Distributed Computing, this is where multiple computers on a shared network each take on a part of a bigger problem
-Contemporary is a modern CPU.