Random Access Memory Flashcards

1
Q

The clock cycle speed of SDRAM is determined by which factor?

The speed of other memory chips present in the system

The speed of the CPU present in the system

The speed of the system bus used by the system

A

The speed of the system bus used by the system

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2
Q

Which statement best indicates the performance characteristics of a system using dual channel RAM?

Separate memory chips can be accessed simultaneously over each channel

Each memory chip will be twice as fast

You must install two memory chips per channel

A

Separate memory chips can be accessed simultaneously over each channel

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3
Q

Which statement best indicates the performance characteristics of a system using triple channel RAM?

The total memory bus width will be 192 bits

You must use exactly three memory chips

Your memory will be three times faster

A

The total memory bus width will be 192 bits

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4
Q

Which physical characteristics distinguishes parity RAM chips from non-parity RAM chips?

Parity RAM chips have 8 modules, non-parity have 9

Parity RAM chips have 9 modules, non-parity have 8

Parity RAM chips are longer than non-parity chips

A

Parity RAM chips have 9 modules, non-parity have 8

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5
Q

DDR3 RAM cycles how many times per bus cycle?

8

2

4

A

4

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6
Q

Which physical chip types were used with DDR4 RAM? (Choose two)

256-pin SODIMM

288-pin DIMM

240-pin DIMM

168-pin DIMM

200-pin SODIMM

A

256-pin SODIMM

288-pin DIMM

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7
Q

DDR2 referred to which performance characteristics as compared to DDR?

It cycled half as many times per bus cycle

It cycled twice as many times per bus cycle

It had twice the capacity chip

A

It cycled twice as many times per bus cycle

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8
Q

How wide is the memory bus on a system that uses single channel RAM?

128 bits

32 bits

64 bits

A

64 bits

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9
Q

In which type of system would you most likely find a SODIMM chip style?

Mobile phone

Desktop computer

Laptop

A

Laptop

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10
Q

ECC memory is able to perform which types of recovery when accessing data?

Detect and correct single bit errors in the entire memory address space

Detect and correct single bit errors for each byte written

Detect and correct single bit errors for each bit written

A

Detect and correct single bit errors for each byte written

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