Module 2: Logic Circuits Flashcards
What is TTL logic?
TTL = Transistor - Transistor Logic.
It consists of BJT transistors talking to each other.
What are the pros and cons of TTL?
Pros: fast, robust, versatile.
Cons: big (BJT’s take lots of room) and consume lots of power.
Explain how this circuit works and what it does.
It’s a TTL NAND gate.
Whilst inputs ‘A’ and ‘B’ are high, there is a reverse-biaed NP junction between the emitter and base. This draws a small reverse-biaed current, whih goes through the collected in to the second transistor. This allows VT2 to conductor (collector - emitter), driving the output ‘Q’ to low.
What is the standard power supply voltage for TTL?
+5V and 0V
What is the ‘fan-out’ of a logic gate?
The number of other logic gates it can drive
Fan-out = IOutput High (driving gate) / IInput High (driven gate)
What are some practical issues with TTL and/or to keep in mind when using it?
- when driving a load with some capacitance, large spikes of current will occur at the output when changing states
- unused inputs should not be left floating (can pick up unwanted noise)
- beware of switch bounce!
- always use appropriate heat sinks
How can one minimise the impact of capacitance loads causing large output current spikes when using TTL?
Place decoupling capacitors (0.01uF - 0.1uF) across an IC throughout the board (every 5 IC’s or so).
What does ‘CMOS’ stand for, and what are its advantages/disadvantages when compared with TTL?
Complementary Metal Oxide Semiconductor
Pro’s: extremely low power consumption, excellent noise immunity, wide range of acceptable power supply voltages
Cons: slower
Convert the following NAND gate into a CMOS equivalent
For a CMOS IC with a supply voltage of 5V, the output levels (e.g. output high, output low) are typically within ____ of the 5V input and 0V ground.
50mV!
What are some typical values of fan-out for a CMOS and TTL IC?
TTL = around 20
CMOS = almost infinite (very low input current!)
From a switching/propogation delay perspective, which is faster: CMOS or TTL? Why?
TTL by a long shot! CMOS has lots of capacitance because of the MOSFETs.
What are the three reasons for power consumption in CMOS circuits?
- Quiescent dissiptation due to leakage currents (i.e. leakage currnts whilst the transistor is off)
- Dynamic dissipation as capacitors in the MOSFETs are charged up and discharged (this is proportional to switching times)
- Through-current dissipation when both n and p channels conduct simultaneously for a time
Why is input protection in CMOS circuits such a big issue? Draw a basic circuit to protect a CMOS input from static build-up.
CMOS gates have a very high resistance, so there’s no leakage path for charge to be removed from the gate. Therefore, massive static charges (100V+) can build up, eventually ruining the insulation of the gate.
What does ‘ECL’ stand for, and what is its claim to fame?
Emitter Coupled Logic
Fastest available logic (faster ever than TTL!), due to BJT’s never being in saturation, and small swing voltages between high and low.