MMU, RISC+CISC, Arbitrary Code, Multitasking Flashcards
Memory Management Unit (MMU)
Handles address translations and memory addressing
Checks for access permissions
Provides security features
A component of the CPU that checks that a memory access is valid.
Reduced Instruction Set Computer (RISC)
Focused on software/compiler to handle efficient register usage
1 instruction per code
Register-to-register design
Focused on small and simple instructions
Faster execution
Used for pipelining instructions and optimizing registers
Complex Instruction Set Computer (CISC)
Focused on hardware and is easy to program
Several clocks per instruction
Memory-to-memory design
Focused on supporting complex instructions that perform operations on an instruction. This reduces the amount of instructions that a task needs
Arbitrary code
Allows code to be inserted into a system, leading to unauthorized code being executed.
Leads to security risks
Multitasking
Running multiple tasks at the same time, and lowers waiting time
Time sharing
The processor switches between different tasks.
Where the CPU’s time is shared with multiple users or processes. Used to insert multitasking.
Direct Memory Access (DMA)
Transfers data between PC components without the need of the CPU
Only needs the CPU to specify the memory address for data transfer
Principle of locality (PoL)
Memory access tends to be together, instructions are likely ordered, data is likely local, and objects near each other are likely accessed at the same time
How does PoL help caching make a CPU more efficient?
Cache is fast and is stored in the CPU.
Storing data/instructions in small clusters reduces the amount of times the CPU has to fetch
Running (Task state)
The task being executed right now. Only 1 per logical CPU core
Ready (Task state)
The task is not running, but could (Allowed by the scheduler)
Waiting (Task state)
The task can’t run. Waiting for I/O data
