Memory Management Flashcards

1
Q

Compile-time address binding

A

The location of variables in memory is known in compile time, hence thair address can be static.

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2
Q

Load-time address binding

A

The location of program data in memory is known when loading the program so it can be set.

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3
Q

Execution-time addresas binding

A

The address of the programs data can change while execution/different states of execution. So there needs to be a base and limit registers that declare the process’ memmory block and eveyrthing is in relation to it.

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4
Q

Memmory management unit

A

Hardware device that maps virtual address to real physical address. Does so by adding the storing a relocation registor which is basically the offset in which the process’ address space in physical memmory starts.

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5
Q

Contiguous Allocation

A

Memory is basically just a lot of addresses. So when a process arrives you want to be able to find a continous chunk of memory in the needed size. To do this, the OS maintins a list of all allocated partitions and free partitions(also called holes).

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6
Q

External Fragmentation

A

There is enough availbale memory to accommodate a process but it is not contiguous. Can be reduced by compaction.

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7
Q

Internal Fragmentation

A

Allocated but unused memory.

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8
Q

Paging

A

Divid physical memory into fixed size frames (512-8,192 bytes). And logical memroy into same sized pages. Allocate just the needed pages for a program, and map logical to physical addresses with a page table.

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9
Q

Page table implementation (PTBR, PRLR)

A

Page table is kept in main memory.
PTBR - Page table base register: points to the page table.
PRLR - Page table length register - the size of the page table.
Each data access needs to memory accesses. One to page table and then to the actual address.

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10
Q

TLB

A

TLB - translation look-aside buffer.
A fast hardware cache for page tables lookups.
When needing to translate a logical to physical address, first search the page in TLB, if not there then look in actuall page table.

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11
Q

valid/invalid bit

A

Each frame in memory has a protection bit that inidcates if the frame is currently in main memory. If it is 1 then it is in main memory, If 0, it is in storage or doesn;t exist and needs to be loaded.

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12
Q

Protection bits

A

Bits that specify the permissions to a certain page: read, write execute and user/kernel bits.

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13
Q

Shared code

A

Only one copy of read only code. The shared code must appear in the same location in the logical address space of all processes so the fixed addresses don’t get messes up.

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14
Q

Hierarchical Paging

A

Instead of having one large page table, a process has multiple levels of page tables. Each level points to a lower level with the last one storing the actual adress. This way, you don’t need the entire page table allocated but only the lower levels you actually need.

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15
Q

Hashed Page Table

A
  1. Extract virtual page number from address
  2. Hash it to find correct bucket
  3. Search linked list for matching virtual page number
  4. If found, use the corresponding physical frame number
  5. If not found, generate page fault
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16
Q

Inverted Page Table

A

Each physical frame has an entry, and contains the process id, and virtual address it is linked to. When looking up a virtual page for a process, you go through the table finding entry that matches the ID and virtual page. This is usauuly sped up by a hash table to make lookup faster.

17
Q

Segmentation

A

Each programs logical space is split into segemnts represting different things such as: code, data, stack, heap. Each segemnt has its own contiguous space in memory and is mapped using a segmentation table.

18
Q

MULTICS

A

Segmentation with paging. A segmentation table entry doesn’t contain the base address of the physical segment but rather the base address of a page table for the segment.