LU2 - Hardware Flashcards
Control Unit
Controls execution of each instruction (sends read/write signals to memory and the addresses of the instruction to be fetched)
Arithmetic Logic Unit (ALU)
Where calculations and logical calculations take place. (Current Instruction is broken down and stored in registers)
Registers
- Made of Static RAM ( is extremely fast)
- very expensive
- Eiter 32-bit or 64-bit
Read Only Memory (ROM
Non-volatile memory chip that can be used to permanently store data.
Serial Processing
Historically CPU’s process one instruction at a time, on single Processor
Hyper-Threading
A method simultaneously breaking up and running program instructions on multiple microprocessors.
- Each part is broken up into individual sets, each instruction is run on different processor.
Multi-processing
Is having multiple CPU’s or cores, on single CPU chip
Muti-processing and Hyper-threading were brought together. 2 cores that are hyper-threaded thus creating 4 logical core.
Processor Cache
Cache memory made up of Static RAM(faster than DRAM and normal RAM)
- It stores blocks of program instructions and data that has been pre-fetched from RAM. In hope that Instructions or data will be needed next by CPU.
Level 1:
Cache is very small amount of memory built into the internal circuitry of CPU (less latency)
Level 2:
Cache memory can be located on top of the CPU chip (further away)
Level 3:
Motherboards contain level 3 cache on actual board itself ( larger than 2, but significantly slower)
RAM
Stores the programs currently in use and data associated with them
Latency
Time taken for a component to respond
Motherboard
The central printed circuit that connects components and devices to each other
System clock
Microchip that regulates the timing and speed of all computer functions
Overclocking
Practise of making components run at rate faster than designed
Per component:
CPU operates faster than system clock by changing its own clock multiplication factor
The Whole System:
System clock is increased affecting all components that detect the system clock and multiply factor
Bandwidth
The theoretical speed of date
Throughput
The actual speed of data, after latency has been applied