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Computer Architecture and Organization > Lesson 1 > Flashcards

Lesson 1 Flashcards

1
Q

refers to those attributes (characteristics) of a system that have a direct impact on the logical execution of a program.

A

Computer Architecture

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2
Q

is part of the abstract model of a computer that defines how the CPU is controlled by the software.

A

Instruction Set Architecture (ISA)

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3
Q

is a model of a computer system (considered either as hardware or software) constructed to allow a detailed and precise analysis of how the computer system works.

A

An abstract model of a machine

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4
Q

What are the 2 classifications of ISA?

A
  1. RISC (Reduced Instruction Set Computer) architecture
  2. CISC (Complex Instruction Set Computer) architecture
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5
Q

It means each instruction cycle requires only one clock cycle, and each cycle contains three parameters. what are these three parameters?

A

fetch, decode and execute

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6
Q

is a memory that uses capacitors to store data.

A

DRAM

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7
Q

It is another type of memory that a computer uses that doesn’t have to be constantly refreshed.

A

SRAM (Static RAM)

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8
Q

is a CPU internal memory and its job is to store copies of data and instructions from RAM that’s waiting to be used by the CPU.

A

CPU cache

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9
Q

It is a highly customized set of instructions used in portable devices due to system reliability such as Apple iPod, mobiles/smartphones, Nintendo DS.

A

RISC Architecture

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10
Q

Some important features of RISC processors are:

A
  1. One cycle execution time
  2. Pipelining technique
  3. A large number of registers
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11
Q

CISC is developed by?

A

Intel

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12
Q

is the continuous and somewhat overlapped movement of instruction to the processor or in the arithmetic steps taken by the processor to perform an instruction

A

pipeline

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13
Q

is the system of naming or representing numbers.

A

number system / numeral system

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14
Q

Write (14)10 as a binary number.

A

14/2 = 7 = 0 MSB
7/2 = 3 = 1
3/2 = 1 = 1
1/2 = 0 = 1 LSB

∴ (14)10 = 1110

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15
Q

Convert (215)8 into decimal.

A

(215)8 = 2 × 82 + 1 × 81 + 5 × 80
= (2 × 64) + (1 × 8) + (5 × 1)
= 128 + 8 + 5
= (141)

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16
Q

ASCII

A

American Standard Code for Information Interchange

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17
Q

occurs when you attempt to store inside an integer variable a value that is larger than the maximum value the variable can hold.

A

Integer Overflow

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18
Q

is a format used to represent alphabets, punctuation marks, and other symbols.

A

Text Code

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19
Q

Text Code composed of:

A
  1. EBCDIC (Extended Binary Coded Decimal Interchange Code)
  2. ASCII (American Standard Code for Information Interchange)
  3. Extended ASCII
  4. Unicode
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20
Q

is a BCD which is representing decimal numbers beyond 9.

A

Packed BCD

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21
Q

is a code for representing 128 English characters as numbers

A

ASCII Code

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22
Q

There are three basic I/O mechanisms that computer systems can use to communicate with peripheral devices:

A
  • memory-mapped input/output
  • I/O-mapped input/output
  • direct memory access (DMA).
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23
Q

uses ordinary locations within the CPU’s memory address space to communicate with peripheral devices.

A

Memory-Mapped I/O

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24
Q

an enhanced version of the 8085 Microprocessor that was designed by Intel in 1976.

A

8086 Microprocessor

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25
The microprocessor cannot do anything by itself therefore, it needs to be linked with memory, extra peripherals, or IO devices. This linking is called
Interfacing
26
The interfacing of the I/O devices in microprocessors can be done in two ways:
1. Memory-Mapped I/O Interfacing 2. I/O Mapped I/O Interfacing
27
is a special form of memory-mapped I/O where the peripheral device reads and writes data located in memory without CPU intervention.
Data Memory Access (DMA)
27
is a special form of memory-mapped I/O where the peripheral device reads and writes data located in memory without CPU intervention.
Direct Memory Access (DMA)
28
is a unique identifier used by a device or CPU for data tracking
memory address
29
is a link between components or devices connected to a computer. It carries data between a CPU and the system memory via the motherboard.
bus
30
3 Types of buses in a computer:
* data bus * control bus * address bus
31
is a group of electrical wires that sends information (data) between two or more components. It is a computer bus that is used to transmit data among components.
data bus / processor bus
32
What are the 2 types of data bus?
serial parallel
33
use a single wire to both send and receive information between components
serial bus
34
usually refer to the types of cables, ports, and connectors used to connect these types of external devices to computers.
FireWire
35
use many wires to communicate between components. Those buses may be internal to the processor or external, relative to a given component being connected.
parallel bus
36
is a set of standards for physically connecting and transferring data between computers and peripheral devices.
SCSI (Small Computer System Interface)
37
is a computer bus that is used by the CPU to communicate with devices that are contained within the computer. It carries control signals from the processor to other components.
Control Bus
38
is a computer bus architecture. It is used to transfer data between devices. It is a computer bus that is used to specify a physical address in the memory.
Address Bus
39
are methods used to locate data and instructions in primary memory.
Memory addressing modes
40
There are 5 different modes of memory addressing in Assembly language:
* Immediate Memory Addressing Mode * Direct Memory Addressing Mode * Indirect Memory Addressing Mode * Register Memory Addressing Mode * Implied Memory Addressing Mode
41
refers to the operational units and their interconnections that realize the architectural specifications.
Computer Organization
42
the output of the learning and processing block, which are sent to different output interfaces to produce the desired output in the real physical world.
Control signals
43
There are two approaches used for generating the control signals in proper sequence:
1. Hardwired Control unit 2. Micro-programmed control unit
44
is a method of generating control signals with the help of Finite State Machines (FSM).
hardwired control unit
45
Finite State Machines is also called as?
FA (Finite Automata)
46
FSM is divided into 2 categories:
1. FA with output 2. FA without output
47
FA with output has 2 categories:
1. Moore Machine 2. Mealy Machine
48
FA without output has 3 categories:
1. Deterministic Finite Automata (DFA) 2. Non-deterministic Finite Automata (NFA) 3. Epsilon-Non-deterministic Finite Automata (E-NFA)
49
is the simplest model of computation and it has a very limited memory.
FSM
50
Then we saw some edges: A >>>>>> B >>1 A >>>>>> C >>0 C >>>>>> A >>0 C >>>>>> D >>1 D >>>>>> C >>1 B >>>>>> D >>0 D >>>>>> B >>0 That edges are called the?
Transitions
51
The labeling of edges is known as?
inputs
52
the circles on the FDA diagram are called?
states
53
is both a symbolic representation of a logical operation and, when used in digital electronics, it can be an actual circuit in hardware.
logic gates
54
who made Boolean Algebra
George Boole
55
the inverse (NOT) of a conjunction (AND) is logically equivalent to the disjunction (OR) of two inverses (NOT).
De Morgan’s Theorem
56
is a way to see all possible conditions for the variables in a logical expression and to chart the results.
truth table
57
are symbols that can directly replace an expression in Boolean arithmetic.
Logic gates
58
what do you call when you connect multiple gates together?
combined logic system or combinatorial logic.
59
uses the software approach to generate the control signals.
microprogrammed control unit
60
The generation of the control signals is determined with the help of the program. This program is stored in the special memory of the processor which is smaller and faster. This memory is termed as? and the program is termed as the?
microprogram memory or control store microprogram
61
The block diagram of the microprogrammed control unit is comprised of the components like:
1. instruction registers 2. microprogrammed/microinstruction address generator 3. microprogram counter 4. control signals
62
holds a machine instruction that is currently being executed. It holds the currently queued instruction for use.
Instruction register
63
determines the address sequence that is read from control memory.
microprogrammed address generator
64
is used to cycling the sequence of control.
microprogram counter
65
is the part of a CPU's control unit that stores the CPU's microprogram.
control store
66
a device that generates addresses in a microprogram.
microsequencer
67
A control store implementation whose contents are unalterable is known as a
Read Only Memory or Read Only Storage
68
one whose contents are alterable is known as a
Writable Control Store.
69
are used to identify the nature of operation
control signals
70
There are 3 control signals that are available in 8085 microprocessors
1. RD (Read) 2. WR (Write) 3. ALE (Address Latch Enable)
71
When the pulse goes high, it indicates when the pulse goes low, it indicates
address data
72
uses a sequence of micro-instruction in micro-programming language.
Microprogrammed Control Unit
73
is the measurement of the length of time that data is being worked on by the processor and is used as an indicator of how much processing is required for a process or how CPU intensive a process or program is.
CPU time
74
are the output of learning and processing block, which are sent to different output interfaces to produce desired output in the real physical world.
control signals
75
There are 2 types of Micro-instructions based on the control word stored in Control Memory (CM):
1. Horizontal 2. Vertical
76
is where the control signals are represented in the decoded binary format that is 1 bit/CS.
Horizontal Micro-instruction
77
The control signals are represented in the encoded binary format.
Vertical Micro-instruction
78
Control Unit Circuit Design can be done in 2 different ways:
1. Hardware Control Circuit 2. Microprogram Control Unit
79
is used to handle the address transferred to the memory unit, and this can be handled either using a bus approach or direct input declaration for the memory.
Control Memory Address Register (CMAR)
80
is a combinational logic circuit that is used to change the code into a set of signals. It is the reverse process of an encoder
decoder
81
is a term, symbol, or name used to define or specify a computing function.
mnemonic

Computer Architecture and Organization (5 decks)

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