Lecture 8 - Multithreaded Processors

Question 1

Sources of Thread Level Parallelism

Answer 1

Multiprogrammed workloads - many independent applications active simultaneously. No synchronisation necessary.

Commercial server workloads - multi-user and multi-process or native multithreaded applications.

Parallel applications - explicitly parallel applications.

Within a program - automatically identify threads in attempt to boost performance of a single program.

Question 2

Hardware needed for fast context switch

Answer 2

Need to replicate the hardware context for each thread.

Question 3

Coarse-grain multithreading

Answer 3

Switch to an alternative thread when the currently active thread stalls, such as on a cache miss.

Question 4

Coarse-grain multithreading - process of switching threads

Answer 4

Context switch occurs in response to a dynamic event which may not be detected until late in the pipeline.

Instructions following the instruction that has caused the thread switch must be flush.

Instructions from new thread then fetched and executed or obtained from thread-switch buffer. Typical thread-switch incurs a 3 cycle penalty.

Question 5

Methods of reducing the thread-switch penalty

Answer 5

Provide pipeline registers for each thread at each pipeline stage so thread can stall without need to flush pipeline. Alternate thread can be switched back without pipeline bubble.

Question 6

Fine-grained multithreading

Answer 6

A new thread is selected on every clock cycle.

Question 7

Advantages of fine-grained multithreading

Answer 7

Can exploit static thread schedule.

Guarantees provided by simple round-robin schedule can be exploited to simplify implementation such as removing need to detect and resolve inter-instruction dependences, and hides memory latency.

Predictable performance provided.

Single-thread performance - severely limited as we always switch to new thread.

Question 8

Dynamic thread selection policies

Answer 8

Avoid switching to a thread if it is currently stalled.

Question 9

Simultaneous Multi-threading

Answer 9

Permit instructions from many different threads to be in-flight simultaneously.

Question 10

Multithreading - impact on memory system

Answer 10

Protection issues:
Add thread ID to TLB entry and cache tag
Threads may share common address space.

Cache Pressures:
Many active threads require larger working set.
Positive and negative cache interference

Load/store queues:
Hardware detects and resolves memory dependencies
Need to be thread aware in SMT processor
Simpler to duplicate queues