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LCST Flashcards

1
Q

RAM is also known as _____

A. RWM
B. MAR
C. ROM
D. MBR

A

A. RWM

A Random Access Memory (RAM) is a volatile chip memory in which both the read and write operations can be performed.
Since it is volatile, therefore
it stores data as long as power is on.
RAM is also known as RWM (i.e. Read
Write Memory).

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2
Q

The symbol shown is for what type of
logic gate?

(LCST FIGURE)

A. NAND
B. AND
C. OR
D. NOR

A

C. OR

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3
Q

Which of the following expressions
represents the Boolean Law of
Absorption?

A. X+X=X
B. X+O=X
C. X·1=X
D. X+XY=X

A

D. X+XY=X

(LCST FIGURE)

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4
Q

A two input MUX would have _____

A. 4 select lines
B. 3 select lines
C. 1 select line
D. 2 select lines

A

C. 1 select line

The two input multiplexer would have n
select lines in 2^n. Thus n = 1.
Therefore, it has 1 select line.

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5
Q

Which combinational circuit is
renowned for selecting a single input
from multiple inputs & directing the
binary information to output line?

A. Both data selector and data distributor
B. DeMultiplexer
C. Data distributor
D. Data Selector

A

D. Data Selector

Data Selector is another name of
Multiplexer. A multiplexer (or MUX) is a
device that selects one of several
analog or digital input signals and
forwards the selected input into a single
line, depending on the active select
lines.

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6
Q

UP-DOWN counter is also known as _____

A. Two Counter
B. Multimode counter
C. Multi counter
D. Dual counter

A

B. Multimode counter

UP-DOWN counter is also known as
multimode counter because it has
capability of counting upward as well as
downwards.

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7
Q

A register is defined as _____

A. The group of latches for storing n-bit of
information
B. The group of flip-flops suitable for
storing binary information
C. The group of flip-flops suitable for storing
one bit of information
D. The group of latches for storing one bit of
information

A

B. The group of flip-flops suitable for
storing binary information

A register is defined as the group of flip-
flops suitable for storing binary
information. Each flip-flop is a binary
cell capable of storing one bit of
information. The data in a register can
be transferred from one flip-flop to
another.

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8
Q

For the electrical symbol illustrated
below to represent “1” as it’s output, the
inputs must be:

(LCST FIGURE)

A. one input “1” the other “O”
B. both inputs “o”
C. the top input “0”, the bottom input “1”
D. both inputs “1”

A

B. both inputs “o”

(LCST FIGURE)

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9
Q

The nominal value of the dc supply
voltage for TTL and CMOS is _____

A. +9V
B. +3V
C. +12V
D. +5V

A

D. +5V

The nominal value of the dc supply
voltage for TTL and CMOS is +5V.

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10
Q

In multiplexer circuits, the enable input
is also known as _____

A. Strobe
B. Sink
C. Decoded input
D. Select input

A

A. Strobe

The enable input is also known as
strobe which is used to cascade two or
more multiplexer ICs to construct a
multiplexer with a larger number of
inputs. Enable input activates the
multiplexer to operate.

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11
Q

The main difference between a register
and a counter is.

A. A counter has no specific sequence of
states
B. A register has capability to store one bit of
information but counter has n-bit
C. A register has no specific sequence of
states
D. A register counts data

A

C. A register has no specific sequence of
states

The main difference between a register and a counter is that a register has no specific sequence of states except in certain specialised applications.

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12
Q

The electrical symbol illustrated below
represents an:

(LCST FIGURE)

A. NOT Gate
B. NOR Gate
C. OP-AMP
D. OR gate

A

B. NOR Gate

An NOR Gate is the combination of both
an OR gate and a NOT Gate

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13
Q

A combinational circuit is one in which
the output depends on the _____

A. Input combination and the previous output
B. Input combination at that time and the
previous input combination
C. Input combination at the time
D. Present output and the previous

A

C. Input combination at the time

A combinational circuit is one in which
the output depends on the input
combination at the time, whereas, a
sequential circuit is one in which the
output depends on present input as well
past outputs

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14
Q

Most demultiplexers facilitate which
type of conversion?

A. AC to DC
B. Odd parity to even parity
C. Decimal-to-hexadecimal
D. Single input, multiple outputs

A

D. Single input, multiple outputs

A demultiplexer sends a single input to
multiple outputs, depending on the
select lines. Demultiplexer converts
single input into multiple outputs.

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15
Q

The terminal count of a typical
modulus-10 binary counter is

A. 1111
B. 1001
C. 0000
D. 1010

A

B. 1001

A binary counter counts or produces the equivalent binary number depending on the cycles of the clock input.
Modulus-10 means count from 0 to 9.
So, terminal count is 9(1001).

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16
Q

How many inputs are required for a 1-
of-16 decoder?

A. 1
B. 8
C. 4
D. 16

A

C. 4

A binary decoder is a combinationa logic circuit which decodes binary information from n-inputs to a maximum of 2 outputs. Here, number of
outputs = 16.16 =2= 2. Thus, number
of inputs is 4.

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17
Q

A procedure that specifies finite set of
steps is called _____

A. Venn diagram
B. Flow chart
C. Algorithm
D. Chart

A

C. Algorithm

A procedure that specifies finite set of
steps is called algorithm, while a
flowchart is a pictorial representation of
the algorithm.

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18
Q

DeMorgan’s theorem states that

A. None of these choices
B. A’+B’= A’B
C. (AB)’= A’ + B’
D (A+ B)’=A’B

A

C. (AB)’= A’ + B’

The DeMorgan’s law states that
(AB)’ = A’+B’&(A+B)’=A’*B’.

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19
Q

How many NAND circuits are contained
in a 7400 NAND IC?

A. 4
B. 8
C. 1
D. 2

A

A. 4

7400 IC’s pin has total 14 pin. Pin no 7
use for GND and pin no 14 used for
+vcc and remaining pins used for
connections. For a NAND gate two
inputs are required and one output is obtained means for NAND gate 3 pin connections are required.

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20
Q

Any signed negative binary number is
recognised by its _____

A. LSB
B. Nibble
C. Byte
D. MSB

A

D. MSB

Any negative number is recognized by its MSB (Most Significant Bit). If it’s 1,then it’s negative, else if it’s 0, then
positive.

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21
Q

A single transistor can be used to build
which of the following digital logic
gates?

A. NAND gate
B. OR gate
C. NOT gate
D. AND gate

A

C. NOT gate

A transistor can be used as a switch.
That is, when base is low collector is
high (input zero, output one) and base is
high collector is low (input 1, output 0).

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22
Q

Which is not an output state for tristate
logic?

A. High-Z
B. LOW
C. Low-Z
D. HIGH

A

C. Low-Z

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23
Q

The difference between a flip-flop &
latch is _____

A. Latch has two inputs but flip-flop has one
B. Both are same
C. Flip-flop consist of an extra output
D. Latches has one input but flip-flop has
two

A

D. Latches has one input but flip-flop has
two

Flip-flop is a modified version of latch.To determine the changes in states, an additional control input is provided to the latch.

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24
Q

Number of outputs in a half adder _____

A. 2
B. 3
C. 0
D. 1

A

A. 2

A half adder gives two outputs. One is called the sum and the other is carry.Half adder can be implemented using an EXOR gate and an AND gate.

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25
Q

MSI includes _____ gates per chip.

A. 13 to 50
B. None of these choices
C. greater than 10
D. 12 to 100

A

D. 12 to 100

Medium Scale Integration includes 12 to
100 gates per chip.

26
Q

The parameter through which 16
distinct values can be represented is
known as.

A. Bit
B. Word
C. Byte
D. Nibble

A

B. Word

It can be represented up to 16 different values with the help of a Word. Nibble is a combination of four bits and Byte is a combination of 8 bits. It is “word” which is said to be a collection of 16-bits on most of the systems.

27
Q

In a multiplexer the output depends on its _____

A. Select inputs
B. Enable pin
C. Data inputs
D. Select outputs

A

A. Select inputs

A demultiplexer sends a single input to
multiple outputs, depending on the
select lines. As the select input
changes, the output of the multiplexer
varies according to that input.

28
Q

Which is not an example of a truncated
modulus?

A. 9
B. 15
C. 8
D. 11

A

C. 8

An n-bit counter whose modulus is less than the maximum possible is called a truncated counter. Here, 9, 11 and 15
modulus counters are truncated
counters. Whereas, modulus-8 is not a
truncated counter.

29
Q

The symbol shown is for what type of
logic gate? (1)

(LCST FIGURE)

A. AND
B. NOR
C. NAND
D. OR

A

C. NAND

30
Q

The Boolean expression X O. Y is for..

A. XOR
B. AND
C. OR
D. XNOR

A

D. XNOR

XOR: Xθ Y
XNOR: XOY
OR: X+Y
AND: XY or X·Y

(LCST FIGURE)

31
Q

The device shown here is most likely a

(LCST FIGURE)

A. Demultiplexer
B. Comparator
C. Inverter
D. Multiplexer

A

A. Demultiplexer

The given diagram is demultiplexer, because it takes single input & gives many outputs.
A demultiplexer is a combinational circuit that takes a single output and latches it to multiple outputs depending on the select lines.

32
Q

The expression:
A + Ā = 1indicates ..

A. commutative law
B. idempotent law
C. absorption law
D. complement law

A

D. complement law

33
Q

A full adder logic circuit will have

A. Two inputs and two outputs
B. Three inputs and three
C. Three inputs and two outputs
D. Two inputs and one output

A

D. Two inputs and one output

A full adder circuit will add two bits and
it will also accounts the carry input
generated in the previous stage. Thus three inputs and two outputs (Sum and Carry) are there. In case of half adder
circuit, there are only two inputs bits
and two outputs (SUM and CARRY).

34
Q

What is a multiplexer?

A. A multiplexer is a device which
converts many signals into one
B. It takes one input and results into many
output
C. It is a type of decoder which decodes
several inputs and gives one output
D. It is a type of encoder which decodes
several inputs and gives one output

A

A. A multiplexer is a device which
converts many signals into one

A multiplexer (or MUX) is a device that selects one of several analog or digital input signals and forwards the selected input into a single line, depending on the active select lines.

35
Q

If the decimal number is a fraction then
its binary equivalent is obtained by _____
the number continuously by 2.

A. Adding
B. Subtracting
C. Multiplying
D. Dividing

A

C. Multiplying

On multiplying the decimal number
continuously by 2, the binary equivalent
is obtained by the collection of the
integer part. However, if it’s an integer,
then it’s binary equivalent is determined
by dividing the number by 2 and
collecting the remainders.

36
Q

Exclusive-OR (XOR) logic gates can be
constructed from what other logic
gates?

A. AND gates and NOT gates
B. OR gates and NOT gates
C. AND gates, OR gates, and NOT gates
D. OR gates only

A

C. AND gates, OR gates, and NOT gates

Expression for XOR is: A(B’)+(A’)B So in
the above expression, the following
logic gates are used: AND, OR, NOT.
Thus, 2 AND gates with two-inputs and
1 OR gate with two-inputs will be
required for constructing a XOR gate.

37
Q

A register is a type of _____

A. Combinational circuit
B. Sequential circuit
C. 1/0 device
D. analog circuit

A

B. Sequential circuit

Register’s output depends on the past
and present states of the inputs. The
device which follows these properties is termed as a sequential circuit. Whereas,combinational circuits only depend on
the present values of inputs.

38
Q

Why are ROMs called non-volatile
memory?

A. They do not lose memory when power is
supplied
B. They lose memory when power is supplied
C. They lose memory when power is removed
D. They do not lose memory when power
is removed

A

D. They do not lose memory when power
is removed

ROMs are called non-volatile memory because of they do not lose memory when power is removed

39
Q

What is the minimum number of two
input NAND gates used to perform the
function of two input OR gates?

A. Four
B. One
C. Two
D. Three

A

D. Three

(LCST FIGURE)

40
Q

How many AND gates are required for a
1-to-8 multiplexer?

A. 6
B. 2
C. 8
D. 5

A

C. 8

The number of AND gates required will be equal to the number of outputs in a demultiplexer, which are 8.

41
Q

A basic S-R flip-flop can be constructed by cross-coupling of which basic logic gates?

A. XOR or XNOR gates
B. AND or NOR gates
C. NOR or NAND gates
D. AND or OR gates

A

C. NOR or NAND gates

The basic S-R flip-flop can be
constructed by cross coupling of NOR or NAND gates. Cross coupling means the output of second gate is fed to the input of first gate and vice-versa.

42
Q

How many outputs will a decimal-to-
BCD encoder have?

A. 16
B. 8
C. 4
D. 12

A

C. 4

An encoder is a combinational circuit
encoding the information of 2 input
lines to n output lines, thus producing the binary equivalent of the input. Thus,a decimal to BCD encoder has 4 outputs.

43
Q

Which of the following is an incorrect
SOP expression?

A. x+y
B. (x+y)(x+z)
C. X+x.y
D. ×

A

B. (x+y)(x+z)

The second expression is incorrect
because it consists of two maxterms
ANDed together.
This makes it a POS or the product of
sum expression.

44
Q

A variable on its own or in its
complemented form is known as a

A. Sum Term
B. Word
C. Product Term
D. Literal

A

D. Literal

A literal is a single logic variable or its complement. For example-X,Y, A,Z,X’ etc.

45
Q

What are the major differences between
the 5400 and 7400 series of ICs?

A. The 5400 series are military grade and
allow for a wider range of supply
voltages and temperatures
B. The 5400 series are military grade and
require tighter supply voltages and
temperatures
C. The 7400 series was originally developed by Texas Instruments and the 5400 series was brought out by National
Semiconductors after TI’s patents expired
as a second supply sour
D. The 7400 series are an improvement over
the original 5400s

A

A. The 5400 series are military grade and
allow for a wider range of supply
voltages and temperatures

The 5400 series are military grade and
allow for a wider range of supply
voltages and temperatures, these are
the major differences between the 5400
and 7400 series of ICs

46
Q

Which ROM can be erased by an
electrical signal?

A. Mask ROM
B. EPROM
C. ROM
D. EEPROM

A

D. EEPROM

EEPROMs (Electrically Erased
Programmable ROM) can be erased by
an electrical signal.

47
Q

Based on how binary information is
entered or shifted out, shift registers are
classified into _____ categories.

A. 3
B. 5
C. 4
D. 2

A

C. 4

The registers in which data can be
shifted serially or parallelly are known as shift registers. Based on how binary information is entered or shifted out,
shift registers are classified into 4
categories, viz., Serial-In/Serial-
Out(SISO), Serial-In/Parallel-Out (SIPO),Parallel-In/Serial-Out (PISO), Parallel-In/Parallel-Out (PIPO).

48
Q

What is the difference between a ring
shift counter and a Johnson shift
counter?

A. There is no difference
B. A ring is faster
C. The Johnson is faster
D. The feedback is reversed

A

D. The feedback is reversed

A ring counter is a shift register (a
cascade connection of flip-flops) with the output of the last one connected to the input of the first, that is, in a ring.
Whereas, a Johnson counter (or
switchtail ring counter, twisted-ring
counter, walking-ring counter, or
Moebius counter) is a modified ring
counter, where the output from the last stage is inverted and fed back as input to the first stage.

49
Q

In 1-to-4 demultiplexer, how many select
lines are required?

A. 2
B. 4
C. 5
D. 3

A

A. 2

The formula for total no. of outputs is given by 2, where n is the no. of select lines. Therefore, for 1:4 demultiplexer, 2 select lines are required.

50
Q

Which of the following logic families
has the highest maximum clock
frequency?

A. AS-TTL
B. HCMOS
C. S-TTL
D. HS-TTL

A

A. AS-TTL

AS-TTL (Advanced Schottky) has a
maximum clock frequency of 105 MHz.
S-TTL (Schottky High Speed TTL) has
100 MHz. Found nothing as HS-TTL.
There are H and S separate TTL.
HCMOS has 50 MHz clock frequency.

51
Q

A Karnaugh map (K-map) is an abstract
form of _____ diagram organized as a matrix of squares.

A. Venn Diagram
B. Block diagram
C. Triangular Diagram
D. Cycle Diagram

A

A. Venn Diagram

A Karnaugh map (K-map) is an abstract
form of Venn diagram organized as a
matrix of squares, where each square
represents a Maxterm or a Minterm.

52
Q

What is the minimum number of two input NAND gates used to perform the function of a NOT gate?

A. Four
B. Two
C. One
D. Three

A

C. One

53
Q

Which of the following expressions represents the Idempotent Law of Boolean Algebra?

A. X+XY=X
B. X+0=0
C. X+1=1
D. X+X=X

A

D. X+X=X

54
Q

The Boolean expression X θ Y is for…

A. AND
B. XNOR
C. XOR
D. OR

A

C. XOR

55
Q

In boolean algebra, the OR operation is
performed by which properties?

A. Distributive properties
B. All of these choices
C. Associative properties
D. Commutative properties

A

B. All of these choices

The expression for Associative property is given by A+(B+C) = (A+B)+C & A(BC) = (AB)C.

The expression for Commutative property is given by A+B = B+A &AB = BA.

The expression for Distributive
property is given by
A+BC = (A+B)(A+C) & A(B+C) = AB+AC.

56
Q

The gates required to build a half adder
are.

A. EX-OR gate and NOR gate
B. EX-OR gate and OR gate
C. EX-NOR gate and AND gate
D. EX-OR gate and AND gate

A

D. EX-OR gate and AND gate

The gates required to build a half adder are EX-OR gate and AND gate. EX-OR outputs the SUM of the two input bits whereas AND outputs the CARRY of the two input bits.

57
Q

Ring and Johnson counters are

A. Synchronous and true binary counters
B. Asynchronous counters
C. True binary counters
D. Synchronous counters

A

D. Synchronous counters

Synchronous counters are the counters
being triggered in the presence of a
clock pulse. Since, all of the clock inputs
are connected through a single clock
pulse in ring shift and Johnson
counters. So, both are synchronous
counters.

58
Q

The expression for involution law is _____

A. (x)x=x
B. X+1=1
C. x+y=y+X
D. (x)’=x

A

D. (x)’=x

The involution law states that the
complement of complement of a
number is the number itself. The third
option justifies the statement. Thus,
(×)’=x.

59
Q

1’s complement can be easily obtained
by using _____

A. Adder
B. Comparator
C. Subtractor
D. Inverter

A

D. Inverter

With the help of inverter the 1’s
complement is easily obtained. Since,
during the operation of 1’s complement 1 is converted into 0 and vice-versa and this is well suited for the inverter.

60
Q

Which of following are known as
universal gates?

A. XOR &OR
B. None of these choices
C. AND & OR
D. NAND & NOR

A

D. NAND & NOR

The NAND & NOR gates are known as
universal gates because any logic
circuit can be realized completely by
using either of these two gates.

61
Q

All computer programs for a machine
are called:

A. hardware
B. none of these choices
C. software
D. input

A

C. software

Computer hardware is any physical device used in or with your machine,whereas software is a collection of programming code installed on your computer’s hard drive.

ELEX (13 decks)

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