Internal computer arvhitectures Flashcards
summarise Von neumann architecture
CPU, arrow, system bus, RAM, Instructions, Data
- shared memory space for instructions and data
- instructions and data stored in the same format
- a single control unit it processor follows a linear fetch, decode, execute cycle
- one instruction at a time
- registers are used as fast access to instructions and data
summarise the Harvard architecture
- instructions and data stored in separate memory units
- each has its own bus
- reading and writing data can be done at the same time as fetching an instruction
- used by RISC processors
disadvantages of harvard architecture
- no adaptability
- not appropriate for general or multi purpose machines as you can’t install and uninstall programs
what is the stored program concept
the idea that instructions are fetched one at a time from main memory and executed immediately by the processor in the sequential order
- program can be replaced by loading another program into memory
- contents in memory location can be interpreted as instruction or data
What happens during the Fetch stage of the Fetch-Execute cycle
- contents of PC transferred to MAR
- Address bus is used to transfer this address to main memory
- main memory content is transferred using the data bus
- contents of memory address location is loaded into MBR
- contents of MBR copied into CIR
What happens during the Decode stage of the Fetch-Execute cycle?
- The Control Unit decodes the instruction held in the CIR.
- : The instruction is split into the opcode and operand
What happens during the execute stage of fetch-decode-execute
- if necessary, data is fetched
- opcode identifies type of operation to be performed
- ALU is used to carry out the operation
- result stored in main memory
what does an instruction contain
an opcode and an operand
what does the opcode do
Tells the CPU what to do
what does an operand do
is a value or is data that will be used in an operation
what can the operand be
- the actual data that you’re performing the operation on
- a memory location where the data is found
whats the difference between direct and immediate addressing
- addressing mode 01 specifies that the data is an address, not a value (direct)
- addressing mode 00 specifies that data is a value, not an address (immediate), represented with a hashtag before the value
Why are registers used as a fast access to instructions and data in the von Neumann architecture?
Because it’s quicker to work with data in the CPU than it is to work with directly in memory
Examples of alternative architecture
- Parallel processing-where the processor carries out a single instruction on multiple data
- distributor computing
What could the operand contain?
It could contain the actual data or an address where the data is found
How to read an instruction
If we are using eight bits:
- The first four bits are the opcode, but the first three bits are the basic machine operation (ADD)
- the last bit of the opcode is the addressing mode
- the last four bits are the operand
How many different opcode would be available in an 8-bit instruction
2^4 (four bits in opcode)
when is the harvard architecture used
- in microcontrollers
- microprocessors
- embedded devices, eg embedded digital signal processing, traffic lights, navigation systems
differences between von numann and harvard
- Harvard uses separate buses, Neumann uses combined buses
why might Harvard architecture be more preferred over Von
- instruction and data can be accessed simultaneously
- avoids possibility of data being executed as code
- program cannot be accidentally overwritten
- different technologies can be used to implement instruction and data memory
- instruction and data memory can have different word lengths
difference between direct and intermediate addressing
direct addressing means that the operand is the address number whereas intermediate addressing means the operand is the datum
Explain why the data bus in a computer system must be bidirectional.
- When data is fetched they have to be transferred from memory to
the processor - data may need to be transferred back to memory
if the data bus is 8 bits wide, how long is each instruction
16
if the address bus is 8 characters long, what is the max address it can transmit
255 (2^8)-1
