Hardware and Virtual Machines P3 Flashcards
What does RISC stand for?
Reduced Instruction Set Computer
What does CISC stand for?
Complex Instruction Set Computer
How does RISC compare to CISC in terms of instruction count?
RISC has fewer instructions; CISC has more
How does instruction complexity differ between RISC and CISC?
RISC uses simpler instructions; CISC uses more complicated ones
How many instruction formats does RISC use?
A small number
How many instruction formats does CISC use?
Many
What kind of instruction cycle does RISC aim for?
Single-cycle whenever possible
What kind of instruction cycle is typical for CISC?
Multi-cycle
What type of instruction length does RISC use?
Fixed-length
What type of instruction length does CISC use?
Variable-length
How does RISC access memory?
Only with load and store instructions
How does CISC access memory?
With many types of instructions
Which has more addressing modes: RISC or CISC?
CISC
Which uses more registers: RISC or CISC?
RISC
What type of control unit does RISC use?
Hard-wired control unit
What type of control unit does CISC use?
Microprogrammed control unit
Which is easier to pipeline: RISC or CISC?
RISC
What is pipelining?
Instruction-level parallelism for faster execution
Why are multiple registers important in RISC?
To allow each pipeline stage its own set of registers
What is a disadvantage of pipelining?
Interrupts complicate instruction handling
What happens during an interrupt in a pipelined CPU?
Pipeline instructions are flushed and ISR is loaded
How many stages are typically used in RISC pipelining?
Five
Name the five pipeline stages.
Instruction Fetch (IF)
What is the performance benefit of pipelining?
One instruction finishes per clock cycle after startup