EXTERNAL DRIVES Flashcards

1
Q

Why are external devices not directly connected to the system bus?

A
  • There are a wide variety of peripherals each with varying methods of operation. Impractical to for the processor to accommodate all
  • Data transfer rates are often slower than the processor and/or memory. Impractical to use the high-speed system bus to communicate directly
  • Data transfer rates may be faster than that of the processor and/or memory. This mismatch may lead to inefficiencies if improperly managed
  • Peripheral often use different data formats and word lengths
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2
Q

What additional features do external devices have to enable them to function in tandem with the main device

A

• Virtually all external devices have buffers, control signals, status
signals, and data bits.
• Those that deal with other forms of energy have transducers that
converts from non-electrical data to electrical data, (e.g. key press to
ASCII in a keyboard), or electrical data to non-electrical data (e.g.
bytes to light in a monitor).

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3
Q

Describe the three principal I/O techniques

A

• Programmed I/O, in which I/O occurs under the direct and continuous control of the program requesting the I/O operation
• Interrupt-driven I/O, in which a program issues an I/O command and then
continues to execute, until it is interrupted by the I/O hardware to signal the
end of the I/O operations
• Direct memory access (DMA), in which a specialized I/O processor takes over
control of an I/O operation to move a large block of data.

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4
Q

What is the purpose of I/O modules?

A
  • Interface to the processor and memory via the system bus or control switch
  • Interface to one or more peripheral devices
  • Data communication
  • Error detection
  • Data buffering
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5
Q

Illustrate the generic model of an I/O module

A

*See notes for pic

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6
Q

What are the different categories of external devices

A

• Human readable e.g. keyboard
• Machine readable e.g. sensors,
camera
• Communication e.g. routers

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7
Q

Describe the architecture and functioning of the I/O module (south bridge and north bridge on a PC)

A

• I/O Modules (south bridge and north bridge on a PC) on the
motherboard provide the logic, buffers, error detection, and ports
to communicate with the external devices on one side, and a
system-type bus on the other.
• For external device interfaces, the modules have data, status, and
control lines.
• For the system bus they have data, address, and control lines.
• The south bridge handles slower I/O devices and is connected to
the north bridge rather than the system bus directly.

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8
Q

Draw an external device block diagram

A

*See notes for pic

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9
Q

What are the typical steps an I/O module takes to handle the

A
  • CPU checks I/O module device status
  • I/O module returns status
  • If ready, CPU requests data transfer
  • I/O module gets data from device
  • I/O module transfers data to CPU
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10
Q

describe programmed I/O

A

With programmed I/O, data are exchanged between the processor and the I/O module. The processor executes a program that gives it direct control of the I/O operation, including sensing device status, sending a read or write command, and transferring the data.

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11
Q

Give a brief description of the steps in the Interrupt Driven I/O Basic Operation

A
  • Interrupt request signal (device -> processor)
  • Finishes execution of the current instruction
  • Acknowledgement of interrupt
  • Save PC and program state information
  • Transfer control to interrupt service handler
  • Restore PC and program state information
  • Execute next instruction
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12
Q

Describe Direct Memory Access

A

Direct Memory Access (DMA) is a capability provided by some computer bus architectures that allows data to be sent directly from an attached device (such as a disk drive) to the memory on the computer’s motherboard.

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13
Q

What are the advantages of using DMA?

A

Transferring the data without the involvement of the processor will speed up the read-write task.
DMA reduces the clock cycle requires to read or write a block of data.
Implementing DMA also reduces the overhead of the processor.
• An efficient technique to move large volume of data

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14
Q

How does the DMA work?

A

When the processor wishes read or send a block of data, it issues a command to the DMA module by sending some information to DMA module. The information includes:

  • read or write command, sending through read and write control lines.
  • number of words to be read or written, communicated on the data lines and stored in the data count register.
  • starting location in memory to read from or write to, communicated on data lines and stored in the address register.
  • address of the I/O device involved, communicated on the data lines.

After the information are sent, the processor continues with other work. The DMA module then transfers the entire block of data directly to or from memory without going through the processor. When the transfer is complete, the DMA module sends an interrupt signal to the processor to inform that it has finish using the system bus.

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15
Q

What are the modes of data transfer in the DMA

A

Burst mode
Cycle-steal mode
Interleaved mode

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16
Q

Describe burst mode

A

In this mode Burst of data (entire data or burst of block containing data) is transferred before CPU takes control of the buses back from DMAC.
This is the quickest mode of DMA Transfer since at once a huge amount of data is being transferred.
Since at once only the huge amount of data is being transferred so time will be saved in huge amount.

17
Q

Describe cycle stealing mode

A

Slow IO device will take some time to prepare data (or word) and within that time CPU keeps the control of the buses.
Once the data or the word is ready CPU give back control of system buses to DMAC for 1-cycle in which the prepared word is transferred to memory.
As compared to Burst mode this mode is little bit slowest since it requires little bit of time which is actually consumed by IO device while preparing the data.

18
Q

Describe interleaved mode

A

In this technique , the DMA controller takes over the system bus when the
microprocessor is not using it.An alternate half cycle i.e. half cycle DMA + half cycle processor.

19
Q

What drawbacks do programmed and interrupt approaches face

A

The I/O transfer rate is limited by the speed with which the processor can test and service a
device.
The processor is tied up in managing an I/O transfer; a number of instructions must be executed
for each I/O transfer.