Exam questions

Question 1

compared to CISC processors, what two features of RISC processors have that can be directly attributed to Moores Law

Answer 1

RISC benefits by
1. having many registers
2. regular ISA

Question 2

how does a microarchitecture relate to an ISA and explain why it is useful to separate the two

Answer 2

a microarchitecture is an instance of the ISA

many microarchitectures can exist for a given ISA, giving a range of products (can have different price, power etc) and still be binary compatible

Question 3

state an interesting feature of the exponent

Answer 3

it is bias - avoiding the need for negative numbers and simplifies comparisons

Question 4

state an interesting feature of the mantissa

Answer 4

it is normalised - simplifies comparisons and allows for a more compact representation

Question 5

one pro and con about 2s complement

Answer 5

+ simplifies arithmetic circuits, single 0
- range is asymmetric

Question 6

how does a computer know that a given word is a floating point value, integer of ASCII character

Answer 6

it does not

the instructions tell it what to do with a given word

Question 7

what is functional completeness

Answer 7

a set of gates sufficient to implement any logical boolean function

Question 8

name the memory hierarchy from smallest to largest

Answer 8

registers, cache, memory, disk

Question 9

how is register to cache memory managed

Answer 9

software - compiler

there are very few registers, so explicit management is needed.
need global knowledge to manage scarce register resources
no time for decision making

Question 10

how is to cache to main memory managed

Answer 10

hardware

cache is not visible to the software
hardware manages them, filling and spilling data from memory

Question 11

how is memory to disk managed

Answer 11

software -

operating system manages page movement between disk and memory
OS manages virtual memory page swapping

note that file accesses could also be stated to come from the OS (since is manages disk mappings) or the user (who may give the command to open or save a file,
disk is slow therefore software is good enough

Question 12

what two problems does virtual memory address

Answer 12

limited capacity of physical memory
- multiple programs sharing limited physical memory (solved by OS managed paging between memory and disk(TLB))

memory safety
solution is protection bits in OS and TLB that are checked on every memory access

Question 13

which is more expensive - cache miss or TLB miss

Answer 13

TLB miss because it involves at least one memory access (same as a cache miss) but also requires a context switch to the kernel to access the page table

Question 14

list the sequence of events associated with the execution of a lw instruction from the perspective of the memory system

Answer 14

1. search the TLB
   1.2. on a miss search the page table
   1.2.3. on a miss transfer block from disk to memory and update the page table
2. update the TLB with a V to P translation
3. search the cache
   3.1. on a miss access the memory and update the cache
4. return the requested word from the cache to the processor

Question 15

what is the TLB

Answer 15

translation lookaside buffer

a address translation table contained in the memory management unit of the CPU
it is small and fast

it is a table of triplets in the form [SB, P, F]
SB - status bits (residence, access, modification - RAM)
P - virtual memory page number
F - physical memory frame buffer

Question 16

why do modern computers have a memory hierarchy rather than a single main memory

Answer 16

the hierarchy achieves a better average case time

Question 17

what information is stored on a stack

Answer 17

return addresses, passing parameters, saving registers that need to be preserved, keeping local variables

Question 18

what is a microarchitecture

Answer 18

An instance of the ISA

many microarchitectures can exist for a given ISA, enabling a range of products with different price / performance / power while being binary compatible

Question 19

explain how the performance of multiprocessor can be improved

Answer 19

performance is a function of cycle count and cycle time

decreasing average cycles reduces the cycle count - this is a win if not accompanied by a proportional increase in cycle time

increasing average cycles can be useful to reduce the number of gates per stages hence reducing the propagation delay and hence cycle time

reduction in cycle time must offset increase in average cycle count

Question 20

state the action taken by the operating system in response to a page fault

Answer 20

bring in a page from disk and install it in memory
update page table
update TLB

Question 21

state the action taken by the operating system in response to a I/O stall

Answer 21

context switch to another process

Question 22

state the action taken by the operating system in response to a load accessing unsafe address

Answer 22

kill the process

Question 23

why when an interrupt is being serviced, other interrupts should not be visible to the processor

Answer 23

because the EPC and cause registers would be overwritten

Question 24

what is the purpose of dual mode architecture

Answer 24

to protect critical system resources
resource mangement
scheduling

Question 25

what trigger switches between the two modes of dual mode architecture

Answer 25

into the kernel - exception

back to user mode - eret instruction / special instruction

Question 26

why is dual mode used in MIPS

Answer 26

so that user programs cannot access resources or memory allocated to other processes

Question 27

list the four steps in the MIPS exception handling mechanism

Answer 27

1. save the address of the current instruction into the EPC
2. transfer control to the OS at a known address
3. handle the exception
4. return to the user program execution (restore user registers and jump to EPC via eret)

Question 28

state and explain the three steps needed to compute the target jump address (for beq)

Answer 28

1. left shift by two - word align, this increases the addressing range of the offset
2. sign extend by 16 bits - needed to form a 32 bit value for address calculation
3. add the shifted sign extended value to PC+4 - compute the final address with respect to PC +4

Question 29

two points on overflow detection

Answer 29

if number with opposite signs are added - NO Overflow is possible

if numbers with identical signs are subtracted - no overflow is possible

Question 30

how does locality exist in programs

Answer 30

instructions are reused (loops, functions etc)

the program only works on a limited set of data (arrays, temporary variables, objects etc)

Question 31

what unit requires a sequential circuit for its implementation

Answer 31

S-R latch

Question 32

name one invalid memory region

Answer 32

register file

Question 33

name one thing that is not a sequential cicuit

Answer 33

ALU

Question 34

Name four things that impact processor performance

Answer 34

cycle time
ISA
cycles per instruction
number of instructions

Question 35

in a processor with caches, an index is used to

Answer 35

location the data in a direct mapped cache

Question 36

name two statements about the usage of the stack

Answer 36

local variables are automatically allocated there
a function call automatically results in allocation of some stack space

Question 37

tag, offset and index size of 6 bit address

Answer 37

2 bits

Question 38

name two mandatory features of a processor

Answer 38

control
data path

Question 39

The MIPS ISA provides several features that facilitate function calls. Name any two such features and explain why they are beneficial.

Answer 39

JAL instruction, $ra register, registers for passing parameters and return values ($a and $v registers), and support for the stack. In general, stack is the only essential feature. All others are only useful from a performance perspective.

Question 40

Explain how a stack is used in implementing function calls. What information is stored on a stack?
.

Answer 40

Keeping track of return addresses, passing parameters, saving registers that need to be preserved, keeping local variables.

Question 41

Name one potential drawback of using a stack as compared to registers for passing function arguments.

Answer 41

Stack-based approach involves more instructions (to maintain stack pointer and for pushes/pops), which reduces performance.

Question 42

You are designing a new computer and have to choose between either stack- or register-based passing of function arguments and return values. Would you go with a stack or register-based approach? Explain your choice.

Answer 42

Stack, since it’s not limited in the number of arguments and return values.