Day 4

Question 1

Main Memory Organization

Answer 1

1. .stack –>memory used for non-static, local variables
2. Free space –> reserved for memory for the .stack and .heap to grow in
3. .heap –> dynamically allocated memory; uninitialized at first
4. .bss –>uninitialized and zero initialized global and static variables
5. .data –>holds non-zero initialized global and static variables, exist throughout life of the program.
6. .text –> stores the compiled code of the currently running program.

Question 2

Software vulnerabilities

Answer 2

Weaknesses allowing an attacker to violate the security of the software system.

Question 3

Buffer

Answer 3

Variable that holds more than one value.

Question 4

Buffer Overflow

Answer 4

Occurs when too many values are written to the buffer, causes data to be written outside the buffer’s allocated memory space.

Question 5

Stack Overflow

Answer 5

Goal is to overwrite the function return address or function pointer in an attempt to redirect the program to malicious code.

Question 6

Multiplexor

Answer 6

Used to select the desired output. Cont selects the bitwise input or the adder input.

Question 7

X86

Answer 7

example of Cisc processor architecture

Question 8

Advanced Risk Machine (ARM)

Answer 8

RISC based processor architecture

Question 9

Big Endian:

Answer 9

most significant byte first

Question 10

Little Endian:

Answer 10

least significant byte first

Question 11

Memory-to-Register:

Answer 11

architecture that supports data processing operations on both registers and memory locations. (cisc)

Question 12

Variable length instructions:

A.

Answer 12

CISC processors use. Each instruction contains an opcode and either one or two operands. More complex to decode and do not perform as well as RISC processors when pipelining instructions. Save storage space.

Question 13

Fixed length instructions:

Answer 13

RISC processors use this. Each instruction contains an opcode and three operands.

Question 14

Principle of equivalence:

Answer 14

any task done by the software can be done by hardware, and any operation performed directly by hardware can be done using software. Hardware is faster, but software is more acceptable because it costs less and easier to modify.

Question 15

Microprogrammed:

Answer 15

software programmed on top of hardware to implement the ISA. CU uses 6-16 registers in a single set.

Question 16

Hardwired:

Answer 16

complete hardware solution to implement the ISA.

Question 17

Which of the following is the implementation of multithreading used by Intel in x86 CPUs?

Answer 17

Hyperthreading

Question 18

Using information sheet 4-8 x86 Processor spec-sheet, how many cores and threads does the Intel i7-3930K processor have?

Answer 18

6,12

Question 19

Pipelining:

Answer 19

allows overlapping execution of multiple instructions in a single fetch-decode-execute data path.

Question 20

Thermal Design Power:

Answer 20

tells cooling system designers how much heat must be dissipated from the CPU.

Question 21

Multi-threaded Processing:

Answer 21

is intelligent scheduling of instructions from two fetch-decode data paths to a single execution stage. (Constantly processing)

Question 22

Using Information sheet 4-8 x86 Processor spec-sheet, what is the TDP of the Intel Core i7-3930K processor?

Answer 22

130W

Question 23

Superscalar Processors:

Answer 23

use a single fetch-decode data path leading to multiple execute stages allowing for more than one instruction per clock cycle. Must check for data dependencies at run time, to prevent executing an instruction that needs data from a previous instruction that is still executing.

Question 24

Instruction- Level Parallelism:

Answer 24

is a result of each stage of a pipeline having an instruction.

Question 25

Clustered Systems

Answer 25

In clustered systems, each computer in the group is a node, and is a complete processing unit. Unlike a network, the entire group of computers appears as a single unit to the user.

Question 26

What purposes can GPUs fill?

Answer 26

1. Graphics
2. Mathematics
3. Cryptography

Question 27

What is short vector processing

Answer 27

an implementation of SIMD that allows execution of an instruction against all elements of a vector simultaneously.

Question 28

What is Standard Performance Evaluation Corporation?

Answer 28

uses a tailored benchmark suite to test the specific functionality for which the system was designed.

Question 29

Shared memory systems

Answer 29

all CPUs have access to a single memory space, communicate via the system bus/memory, and must lock memory prior to accessing it.

Question 30

Multicore Processing:

Answer 30

consists of two or more processing units on a single chip.

Question 31

Field-programmable gate array

Answer 31

is an integrated circuit configured by the customer

Question 32

Asymmetric multiprocessing:

Answer 32

software known as hardware description language (HDL).

assigns one CPU as the master, which manages the system and controls all resource scheduling.

Question 33

MIPS or Million instructions per second:

Answer 33

uses a mixture of floating-point and integer arithmetic and logical operations to make a general-purpose performance measurement of a computer system, ignoring system design concerns.

Question 34

What provides true multitasking?

Answer 34

Multicores

Question 35

Distributed shared memory systems

Answer 35

each CPU has independently allocated memory within the shared memory space, and communicate via a dedicated interconnect.

Question 36

What does symmetric multiprocessing do?

Answer 36

gives all processors equal access to the OS and all system resources.

Question 37

Multiple Instruction Multiple Data (MIMD:

Answer 37

is the computer architecture classification in which multiple processing units fetch individual instructions and perform their operations on individual pieces of data.