Day 3 Flashcards
Order of Magnitude
comes from the scientific notation of very large numbers in which each order of magnitude is ten times the previous one. (computers use an abridged version to describe how big or fast something is)
Exa Peta Tera Giga Mega Kilo
Milli
Micro (u)
Nano
10^18 --> 2^60 10^15 --> 2^50 10^12 --> 2^40 10^9 --> 2^30 10^6 --> 2^20 10^3 --> 2^10
10^-3
10^-6
10^-9
Digital Logic
use of electronic switches to solve Boolean functions.
Closed vs Open with circuits
Closed = on = T Open = off = F
Logic Gates
electronic device that performs Boolean operations
What is an I/O table
lists all possible input signals together with their corresponding output signals
Know what the symbols for:
AND OR NOT NAND NOR XOR look like
What is current computer architecture derived from ?
John Von Neumann’s 1945 draft report on the electronic discrete variable automatic computer (EDVAC)
What is a stored-program concept?
allows instructions and data to be stored in memory rather than being manually entered every time the program is run.
The Harvard Architecture
solves bottleneck by having separate memory and I/O for data read, data write, and instruction read. Allows the writing of data to memory while the next instruction is being read.
CPU
Central processing unit aka processor.
Active part of the computer.
Contains data paths and controls
Memory
storage area where programs are kept when they are running.
I/O
How we pass data between the CPU and memory.
input = keyboard, mouse
output = monitor printer
Little man Computer
created by Stuart Madnick. introduces simplified, but typical set of instructions a computer can perform.
Registers
small amounts of storage space within the CPU used to perform operations. There are two types GPR (any purpose) and SPR (single/special purpose)
Accumulator
A - 3 digit GPR used by the arithmetic logic unit. executes arithmetic ops and logic decisions.
Program counter (PC)
2 digit SPR used to point the CU to the correct memory address of the next instruction
Instruction register (IR)
3 digit SPR used by the decoder to decode the instruction.
Memory Address Register (MAR)
2 digit SPR used to point to the correct memory address to read or write.
Memory Data Register (MDR)
3 digit SPR used to hold data to be read from or written to the ALU or memory. there are 100 memory addresses 0-99; each can hold 3 digits.
Memory Management Unit (MMU)
manages data passed to or fetched from memory.
Control Unit (CU)
performs fetch and decode steps by moving data and addressses between the registers and I/O or MMU
Instruction Set Architecture (ISA)
vocabulary of commands understood by the CPU and the interface that allows all software to run on the hardware.
Opcode
numeric value that represents an instruction to the CPU
Mnemonic
(short character sequence) represents each opcode
Operand
indicates what data the opcode is to work with
Fetch-decode-execute (F-D-E) cycle
process used by the CPU to retrieve, interpret, and perform each instruction of a program.
Machine control
HLT 000
PC –> MAR
MDR –> IR
Arithmetic (ADD)
ADD 1XX PC --> MAR MDR --> IR IR (ADDR) --> MAR A + MDR --> A PC + 1 --> PC
Arithmetic (SUB)
SUB 2XX PC --> MAR MDR --> IR IR (ADDR) --> MAR A - MDR --> A PC + 1 --> PC
Data Transfer (STA)
STA 3XX PC --> MAR MDR --> IR IR (ADDR) --> MAR A --> MDR (INTO MEMORY) PC + 1 --> PC
Data Transfer (LDA)
LDA 5XX PC --> MAR MDR --> IR IR (ADDR) --> MAR MDR --> A (OUT OF MEMORY) PC + 1 --> PC
Control Transfer (BRA)
BRA 6XX
PC –> MAR
MDR –> IR
IR (ADDR) –> PC
Control Transfer (BRZ)
BRZ 7XX PC --> MAR MDR -->IR IF A = = 0 THEN IR (ADDR) --> PC ELSE PC + 1 --> PC
Control Transfer (BRP)
BRP 8XX PC --> MAR MDR --> IR IF A >= 0 THEN IR (ADDR) --> PC ELSE PC + 1 --> PC
I/O (INP)
INP 901 PC --> MAR MDR --> IR INBOX --> A PC + 1 --> PC
I/O (OUT)
OUT 902 PC --> MAR MDR --> IR A --> OUTBOX PC + 1 --> PC
