CSCI 223 Quiz Memory Hierarchy Flashcards

1
Q

RAM is traditionally packaged as a ?; basic storage unit is normally a ?

A

chip; cell (one bit per cell)

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2
Q

static RAM (SRAM)

A

each cell stores a bit with a four or six-transistor circuit; retains value indefinitely, as long as it is kept powered, relatively insensitive to electrical noise (EMI), radiation, etc.; faster and more expensive than DRAM

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3
Q

dynamic RAM (DRAM)

A

each cell stores bit with a capacitor, one transistor per bit; value must be refreshed every 10-100ms; more sensitive to disturbances (EMI, radiation, …) than SRAM; slower and cheaper than SRAM

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4
Q

DRAM and SRAM are ? memories because

A

volatile; they lose info. if powered off

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5
Q

nonvolatile memories retain value even if powered off - examples?

A

ROM, PROM, EPROM, EEPROM, flash memory

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6
Q

ROM

A

read-only memory: programmed during production

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7
Q

PROM

A

programmable ROM: can be programmed once after manufacturing

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8
Q

EPROM

A

erasable PROM: can be bulk erased (UV, X-Ray)

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9
Q

EEPROM (what’s on our system)

A

electrically erasable PROM: electronic erase capability

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10
Q

flash memory

A

EEPROMs with partial (sector) erase capability; wears out after about 100,000 erasings

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11
Q

bus

A

a collection of parallel wires that carry address, data, and control signals; typically shared by multiple devices

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12
Q

memory read transaction & describe

A

movl A, %eax
CPU places address A on the memory bus
main memory reads A from the memory bus, retrieves word x, and places it on the bus
CPU reads word x from the bus and copies it into the register %eax

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13
Q

memory write transaction & describe

A

movl %eax, A
CPU places address A on bus; memory reads it and waits for the corresponding data word to arrive
CPU places data word y on the bus
main memory reads data word y from the bus and stores it at address A

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14
Q

which is more complicated: memory read or memory write?

A

write

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15
Q

describe the “Power Wall”

A

2003 - decided to increase the number of cores, which decreases the speed but saves power

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16
Q

the CPU-Memory performance gap & key to fixing

A

the gap widens between DRAM, disk, and CPU speeds; the key to bridging this CPU-Memory gap is locality

17
Q

principle of locality

A

programs tend to use data and instructions with addresses near or equal to those they have used recently

18
Q

temporal locality

A

recently referenced items are likely to be referenced again

19
Q

spatial locality

A

items with nearby addresses tend to be referenced cose together in time