Copper Deposition Flashcards

1
Q

What are the advantages of Cu over Al?

A
  1. Lower resistivity
  2. Better mechanical properties such as Young’s modulus
  3. Better thermal conductivity (less prone to overheat)
  4. Higher resistance electro-migration (better reliability) due to a higher melting point and better thermal conductivity
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2
Q

What are the advantages of Al over Cu?

A

Cu has a lower resistance to corrosion

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3
Q

Why is the Damascene process required for Cu interconnect patterning?

A

Al interconnects were created using subtractive etching - metal is deposited and then the undesirable areas are etched away. Dry etching is used because anisotropy is critical in thin interconnects, so RIE is the method of choice.

Cu cannot be etched using RIE because the temperature required to etch the Cu is too hot for the other chip elements.

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4
Q

Why is a barrier layer required between the FOTL and the Cu interconnects? What material is used for this barrier?

A

Cu is a fast-diffusing metal that can create deep traps if allowed to reach the silicon. This can kill the transistors.

The solution to this issue is a barrier layer between the interconnects and the FOTL.

The layers are as follows:

  1. Transistor contacts
  2. Cobalt silicide
  3. Tungsten plugs
  4. Diffusion barrier - TiN, Ta, or some other material
  5. Cu interconnects

The fabrication steps are also physically separated in order to prevent this issue.

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5
Q

What is the Damascene process?

A

This is an additive patterning process that is used for the deposition of Cu interconnects. Essentially, dielectric is deposited and etched to make the trench pattern. Copper is deposited in the trenches. Then, CMP is used to remove excess metal.

This process is repeated for each layer of metallization.

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6
Q

What is the difference between the single Damascene process and the dual Damascene process?

A

The single Damascene process is used to deposit W plugs. A trench is patterned, filled, and then excess metal is removed using CMP.

The dual Damascene process is used to deposit metal interconnects, both interconnects (horizontal) and vias (vertical) at once. This accomplishes the metallization in fewer steps.

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7
Q

What are the steps in the dual Damascene process?

A
  1. Dielectric deposition
  2. Pattern/etch to form via/trench (either via first or trench first)
  3. Deposit diffusion barrier
  4. Cu seed layer deposition by PVD
  5. Cu electroplating to fill via and trench
  6. CMP to remove excess Cu
  7. Etch stop layer deposited
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8
Q

Why is a diffusion barrier used in Cu interconnect depositon?

A
  1. To stop the diffusion of Cu into the ILD or FOTL where it can create deep traps and kill the chip
  2. Provides good adhesion for the Cu
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9
Q

Why is Cu electrochemically deposited?

A

Electrochemical deposition accomplishes “bottom up” filling or “super-filling”. This means that the deep trenches are filled from the bottom first, so voids do not develop within the trenches.

This cannot be carried out by PVD or even by CVD.

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10
Q

What additives are used in Cu electroplating?

A

Two main types of additives are used:

  1. Accelerators, which accelerate the rate of deposition on the trench bottom
  2. Suppressors, which suppress deposition on the trench walls
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11
Q

What types of suppressors are used in Cu electroplating?

A

Suppressors can be broken down into two categories:

  1. Carriers, which suppress mass transport by forming a thin film
  2. Levelers, which reduce the surface topography and create a uniform layer
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12
Q

What advantages does Co have over Cu?

A

The mean free path of electrons is about 4x lower in Co than in Cu, due to the hexagonal structure.

The lower mean free path means that there are more electron-electron collisions, so each collisions is less energetic. This improves the resistance of Co to electromigration.

Electromigration resistance is increasingly important in thin layers where electromigration is a big reliability issue.

Also, in Cu metallization a seed layer + diffusion barrier is required. In Co a single, thinner barrier layer can be used, which reduces the area required for metallization and improves chip speed.

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13
Q

What advantage does Cu have over Co?

A

Lower resistivity

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