Computer organisation and architecture Flashcards
Addressable memory
The concept of storing data and instructions in a memory with discrete, unique addresses.
Address bus
A bus that carries the memory location address of the register the data is being carried to or from.
Control bus
A part of the CPU that controls and manages the executions of instructions. It sends control signals to coordinate execution and controls Fetch-Decode-Execute cycles and buses.
Data bus
A bi-directional bus for carrying data and instructions between the processor and memory.
Harvard architecture
A computer architecture that stores data and instructions in separate memories to allow the next instruction to be read while data is currently being read or written.
I/O controllers
An interface that allows the processor to communicate with Input/Output devices connected to the computer.
Main memory
A data store for instructions for the processor that can be directly addressed by the processor.
Processors
A complex chip of transistors capable of executing programs, computer data to outputs, and supervising the operation of a computer system.
Von Neumann architecture
A computer architecture where a single control unit manages program control via a linear sequence of fetch-decode-execute cycles. Data and instructions are held in the same memory.
Stored program concept
Machine code instructions stored in main memory are fetched and executed serially by a processor that performs arithmetic and logical operations.
Arithmetic and logic unit (ALU)
A part of the processor that performs arithmetic calculations and logical operations on data for the computer programs.
Clock
A timing device connected to the processor that periodically generates a signal to synchronise fetch, decode, execute cycle runs and other components of the computer.
Control unit
A part of the processor that controls and manages the execution and controls Fetch-Decode-Execute cycles and buses.
Current instruction register
A dedicated register that stores the address of the instruction that is being executed in the processor.
Dedicated register
A register reserved for a specific purpose or role essential to the running go the processor.
General purpose registers
Special memory cells in the processor that can be accessed quickly. They temporarily store data and control information.
Memory address register
A special register that stores the memory address of the next instruction to load or data to use.
Memory buffer register
A special register that temporarily stores data to be read from or written to the computer’s memory.
Program counter
A dedicated register that stores the address of the next instruction to execute.
Status register
A dedicated register containing information about the intermediate states or outcomes of various processes in the processor.
Fetch-decode-execute cycles
The process of fetching from memory (supplying the address and retrieving the instruction from memory), decoding (interpreting the instruction and then reading and retrieving the required data from their addresses) and executing the instruction (CPU carries out the required actions).
Instruction set
A set of sequenced operations in machine code that can be recognised by a particular processor as the execution of a command.
Opcode
The part of an instruction that explains what action the instruction performs.
Operand
The part of an instruction with a value, memory address or register that the instruction will act on during its execution.
