computer architecture Flashcards

1
Q

Processor Role

A

Executes program instructions

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2
Q

Bus Definiton

A

Series of parallel wires that connect internal components of a computer system

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3
Q

Address Bus

A

Transports memory addresses, specifying where data is retrieved/sent to
More wires in parallel = more addressable memory

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4
Q

Data Bus

A

Sends data and instructions in the system
Increasing width increases the rate of data transfer

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5
Q

Control Bus

A

Carries clock signal

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6
Q

Harvard Architecture

A

Diff memory locations for data and instructions (ensures read only instructions)
Used in embedded systems and digital signal processing
Performs better than VN as different buses means more efficient fetching etc

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7
Q

Stored Program Concept

A

Data and instructions stored in Main Memory
Which are fetched and ran sequentially
Programs can be loaded in and out of main memory

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8
Q

ALU Role

A

Arithmetic Logic Unit
Performs arithmetic and logic operations

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9
Q

Control Unit Role

A

Handles the fetch execute cycle
Controls various components

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10
Q

Register Def

A

Small storage locations with high read and write speed

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11
Q

PC Role

A

Program Counter
Holds memory address of the next instruction to be executed

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12
Q

CIR Role

A

Current Instruction Register
Holds the current instruction being processed by the processor

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13
Q

MAR Role

A

Holds the address of a location to be read or written

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14
Q

MBR Role

A

Memory Buffer Register Holds the contents that have been fetched from a memory address

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15
Q

Status Register

A

Contains number of bits, blue of which changes to indicate number of interrupts

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16
Q

Clock

A

Synchronises the communication of components by giving a regularly timed signal

17
Q

Fetch Execute Decode Cycle

A

Contents of the PC copied into MAR
PC increments
Contents are copied into MBR
MBR contents copied into CIR
Instruction is decoded and data fetched if necessary
Instruction processed/sent to ALU
Result stored in the accumulator

18
Q

Interrupt checking

A

Current processor state saved on stack
Source identified
Interrupt service routine called
Process restored

19
Q

Factors of processor performance

A

Number of cores
Cache memory
Clock speed
Address and Data bus widths
Word length (number of bits that make up a single unit)