Chapter 6: Processor Subsystem Flashcards

1
Q

According to IBM, which Intel Xeon processor is designed for virtualization environments?

A

Xeon 7400 Series

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2
Q

How large is the external cache line in the NetBurst Architecture?

A

64-bytes

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2
Q

Which Intel Xeon CPU Architecture uses Simultaneous Multi-threading?

A

Nehalem

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3
Q

The Xeon MP Tulsa Range of frequencies from?

A

2.5 to 3.2 GHz

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3
Q

With two CPUs, expect how much improvement when you double the L2 cache size

A

4% to 6%

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4
Q

According to IBM which Intel Xeon CPU is known as the workhorse processor?

A

Xeon 5500 Series (Gainestown)

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4
Q

Netburst architecture can support a what clock rate

A

5Ghz

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4
Q

What three small processors have recently been introduced in the server environment?

A

ARM, Snapdragon (Qualcomm), and Atom (Intel)

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4
Q

With four CPUs, expect how much improvement when you double the L2 cache size

A

8% to 10%

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5
Q

In Split-Plane or Dual Dynamic Power Management (DDPM) CPUs the Power Supply for the Core is?

A

Independent to the core

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7
Q

What was the first first Intel processor to use lower power consuming Intel Core Architecture over the older Netburst architecture?

A

Intel Xeon 5100 (Woodcrest)

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7
Q

Intel Wide Dynamic Execution allows how many instructions to be processed simultaneously?

A

4

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8
Q

Which Intel CPU introduced demand-based switching?

A

Intel Xeon 5100 (Woodcrest)

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10
Q

Which Intel Xeon CPU Architecture has shared last level cache?

A

Nehalem

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12
Q

What advantage do Switched Nodes offer over other FSB technologies?

A

Increased throughput

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13
Q

With eight CPUs, expect how much improvement when you double the L2 cache size

A

10% to 15%

14
Q

NetBurst Architecture is usable up to how many cores?

A

2

15
Q

Electron leakage results in what?

A

Large power consumption

16
Q

The Xeon DP Woodcrest Range of frequencies from?

A

1.6 to 3.0 GHz

17
Q

EPIC stands for what?

A

Explicitly Parallel Instruction Computing

19
Q

In a Switched Fabric Topology, what device is used to connect the nodes to each other?

A

A Switch

21
Q

Which Intel CPU replaced Core Microarchitecture with Nehalem Microarchitecture

A

Xeon 5500 Series (Gainestown)

23
Q

With the increase of clock rate in NetBurst, you also have an increase in what?

A

Heat and Power Consumption

24
Q

With Intel Wide Dynamic Execution, Some instructions can be combined into a single instruction using the technique of?

A

Macrofusion

25
Q

Which AMD CPU managed cache transfers through a crossbar switch?

A

Revision F Opteron

26
Q

Was it AMD or Intel who released the first backwards compatible 64bit CPU?

A

AMD

27
Q

What was the first Intel dual core to include an included shared L3 cache?

A

Intel Xeon 7100 (Tulsa)