Chapter 3 - Types of processor Flashcards
What is the stored program memory concept?
» Machine code instructions are fetched and executed serially by a processor that performs arithmetic and logical operations
How is the machine code fetched in Von Neumann’s architecture?
1 Mark
» Are fetched from memory one at a time, decoded and executed in the processor
Name 5 descriptions of Von Neumann’s architecture.
5 Marks
» Shared memory space for instructions and data
» Can access instructions and data required using a dedicated bus
» Single Processor CU manages program control and single ALU
» Same bus used for transferring both instructions and data
» Uses FDE cycle to excute one isntruction at a time in a linear sequence
What is the one problem of Von Neumann’s architecture and the 2 advantages?
» The data bus is slower than the rate at which the CPU can carry out instructions - Von Neumann Bottleneck - CPU has to wait for the data transfer as it is much faster
» Simpler operating system
» Easy to program
What is Harvard architecture extensively used in?
» With embedded Digital Signal Processing (DSP)
What is DSP?
» The DSP applications include audio and speech signal processing, sonar and radar signal processing and digital image processing
What are embedded systems?
1 Mark
» Special purpose computers built into devices often operating in real-time, such as those used in navigation systems
Name 4 descriptions of Harvard architecture.
4 Marks
» Memory is split into 2 parts
» One part for data and another part for program instructions
» Each part is accessed with a different bus
» Allows for pipelining
Why is data and instructions being fetched with a different bus an advantage?
1 Mark
» Allows the CPU to pipeline as the CPU can fetch both data and instructions at the same time
Can Harvard architecture be faster than von Neumann’s architecture?
» Yes because data and instructions can be fetched in parallel instead of competing for the same bus and avoids von Neumann bottlenecks
What is the one comparison between the Harvard and Von Neumann architecture in terms of where they are conventionally used?
1 Mark
» Von Neumann - used in conventional processors in PC’s
» Harvard used in DSP
What is the one comparison between Harvard and Von Neumann’s architecture in terms of memory?
1 Mark
» Von Neumann - data and programs share the same memory
» Harvard - the instructions and data are held in separate memories
What is the one comparison between the Harvard and Von Neumann architecture in terms of buses?
1 Mark
» One bus is used to transfer data and instructions - Von Neumann
» Parallel data and instruction buses may be used - Harvard
What is the one comparison between Harvard and Von Neumann’s architecture in terms of size?
1 Mark
» Programs can be optimised in size - Neumann
» Programs tend to be large - Harvard
What does CISC stand for?
1 Mark
» Complex Instruction Set Computer
What is the instruction set?
1 Mark
» Set of all instructions written in machine code, that can be recognised and executed by a given CPU
What is the aim of a CISC processor?
1 Mark
» Aims to complete the task in few lines of code as possible
What is complex instruction?
» Combines a load/store instruction with the instruction that carries out the actual calculation
With a CISC processor, what is so special about the hardware?
» Processor hardware and circuitry has to be more complicated so it can understand and execute a series of operations within one instruction
» Therefore more expensive
How many clock cycles do complex instructions take to execute and why?
» Takes more than one clock cycle, because its performing multiple operation
What are the three advantages of a CISC processor?
3 Marks
» Quicker to code programs
» Compiler has very little work to do to translate a high-level language statement into machine code
» Since code is short - requires less RAM is required to store the instructions
What are the three disadvantages of a CISC processor?
3 Marks
» They are larger as they require more transistors, making them more expensive
» Take multiple cycles per line of code, therefore programs run more slowly due to comploicated circuit
» Pipelining is not possible
What does RISC stand for?
1 Mark
» Reduced Instruction Set Computer
What does RISC aim to do?
1 Mark
» Aim to use simple instructions that will be executed within a single clock cycle