Architecture Textbook 2 Flashcards
Conditional Branches
Instruction that tests value + allows for subsequent transfer of control to new address in program based on test outcome.
Basic Block
Sequence of instructions without branches (except potentially at end) + without branch targets or branch labels (except possibly at start). One of earliest phase of compilation is to break program into these.
Condition codes/flags
4 extra bits that record what happened during instruction. Negative (N), zero (Z), overflow (V) + carry (C).
Negative (N)
Result that set condition code had 1 in most signif bit.
Zero (Z)
Result that set condition code had 0 in most signif bit
Overflow (V)
Result that set condition code overflowed.
Carry (C)
Result that set condition code had carry out of most signif bit or borrow into most signif bit.
Branch Address Table/Branch Table
Table of addresses of alternative instruction sequences. e.g. case/switch statement.
Procedure/Function
Stored subroutine that performs specific task based on parameters it’s provided with. e.g. Method.
Branch-and-Link Instruction
Instruction that branches to address + simultaneously saves address of following instruction in register.
Return Address
Link to calling site that allows procedure to return to proper address. In LEGv8, stored as register.
Caller
Program that instigates procedure + provides necessary parameter values.
Callee
Procedure that executes series of stored instructions based on parameters provided by caller + returns control to caller.
Program Counter (PC)
Register containing address of instruction in program being executed.
Stack
Data structure for spilling registers organised as last in first out queue.
Stack Pointer
Value denoting most recently allocated address in stack that shows where registers should be spilled/where old register values can be found. In LEGv8, it’s register SP.
Push
Add element to stack.
Pop
Remove element from stack.
Leaf Procedures
Procedures that don’t call others.
Global Pointer
Register reserved to point to static area.
Procedure Frame/Activation Record
Segment of stack containing procedure’s saved registers + local variables.
Frame Pointer
Value denoting location of saved registers + local variables for given procedure. Some ARMv8 compilers use this to point to first doubleword of procedure frame.
Text Segment
Segment of UNIX object file that contains machine language code for routines in source file. Home of LEGv8 machine code.
Static Data Segment
Above code. Place for constants + other static variables..
The Heap
Segment for data structures that grow and shrink. Placed next in memory.
Halfwords
16 bit quantities
PC-Relative Addressing
Addressing regime in which address is sum of PC + constant in instruction.
Addressing Mode
1 of several addressing regimes delimited by their varied use of operands +/or addresses. e.g. immediate addressing, register addressing, base/displacement addressing, PC-relative addressing.
Register Addressing
Operand is register.
Immediate Addressing
Operand is constant within instruction.
Base/Displacement Addressing
Operand is at memory location whose address is sum of register + constant in instruction.
Data Race
2 memory accesses form data race if they’re from diff threads to same location, at least 1 is write + occur 1 after another.
Assembly Language
Symbolic language that can be translated into binary machine language.
Pseudoinstruction
Common variation of assembly language instructions often treated as if it were an instruction in its own right.
Symbol Table
Table that matches names of labels to addresses of memory words that instructions occupy.
Linker/Link Editor
Systems program that combines independently assembled machine language programs + resolves all undefined labels into executable file. Places code + data modules symbolically in memory, determines addresses of data + instruction labels, then patches internal + external refs.
Exectuable File
Functional program in object file format that contains no unresolved refs. Can contain symbol tables + debugging info. Stripped executable doesn’t contain those. Relocation info may be included for loader.
Loader
Systems program that places object program in main memory so it’s ready to execute.
Dynamically Linked Libraries (DLLs)
Library routines linked to program during execution.
Java Bytecode
Instruction from instruction set designed to interpret java programs.
Java Virtual Machine (JVM)
Program that interprets java bytecodes. Interpreters improve portability but reduce performance.
Just In Time Compiler (JIT)
Compiler that operates at runtime, translating interpreted code segments into native comp code. Preserves portability + improve execution speed compared to JVM.
Object Oriented Language
Programming language that is oriented around objects rather than actions, or data vs logic.
General Purpose Register
Register that can be used for addresses/data with virtually any instruction.
Load-store Architecture/Register Architecture
Instruction set architecture in which all operations are between registers + data memory may only be accessed via loads/stores.
