Architecture and Organization (3)

Question 1

Collectively called the data bus

Answer 1

Data lines

Question 2

Perform the operation indicated in the instruction

Answer 2

Data Operation

Question 3

Specify operations to be performed

Answer 3

Command Signlas

Question 4

If the operation involves reference to an operand in memory or available via I/O, then determin the address of the operand

Answer 4

Operand Address Calculation

Question 5

Disable interrupts whule ann interupt is being processed

Answer 5

Disabled Interrupt

Question 6

PCI signal line group that includes the clock and reset pins

Answer 6

System pins

Question 7

It consists of the significant digits in a scientific notation or floating point number

Answer 7

Normalized Mantissa

Question 8

Are used to control the access to and the use of the data and address lines

Answer 8

Controle Lines

Question 9

Efficient way of storing fractions

Answer 9

Floating Point

Question 10

Employed to hold temporarily the right hand instruction from a word in memory

Answer 10

IBR

Question 11

Analyze instruction to determine type of operation to be performed and operand/s to be used

Answer 11

Instruction Operating Decoding

Question 12

Basic Functon performed by a Computer

Answer 12

Execution of a program

Question 13

Employed to hold temporary operand and results of ALU operations

Answer 13

AC and MQ

Question 14

Added to the actual exponent in order to get the stored exponent

Answer 14

Biased Exponent

Question 15

It is simply means that the processor can and will ignore that interrupt request signal

Answer 15

Disabled interrupt

Question 16

It indicates the validity of data and address information

Answer 16

CC

Question 17

Contains the 8-bit opcode instruction being executed

Answer 17

IR

Question 18

PCI signal line group that controls the timing of transactions and provides coordination among initiators and targets

Answer 18

timing signals

Question 19

These pins are needed to support a memory on PCI that can be cached in the processor or another device

Answer 19

Cache Support Pins

Question 20

Contains the address of the next instruction-pair to be fetched from memory

Answer 20

PC

Question 21

These pins are provided for PCI devices that must generate requests for service

Answer 21

Interrupt Pins

Question 22

He and his colleagues in 1946 began the design of a new stored-program computer at Princeton Institute for Advanced Studies

Answer 22

John Von Neuman

Question 23

Fetch the operand from memory or read it in from I/O

Answer 23

Operand Fetch

Question 24

The processing required for a single instruction

Answer 24

Instruction Cycle

Question 25

A feature of computer systems that allows certain hardware subsystems to access main system memory, independent of the central processing unit

Answer 25

Direct Memory Access

Question 26

It is a communication pathway connecting two or more devices

Answer 26

Bus

Question 27

Specifies the address in memory of the word to be written form or red into the MBR

Answer 27

MAR

Question 28

A computer gets its instructions by reading them from memory, and a program could be set or altered by setting the values of a portion of memory

Answer 28

Stored-Program Concept

Question 29

PCI signal line group that is used to report parity and other errors

Answer 29

Error Reporting Pins

Question 30

Read instructions from its memory location into the processor

Answer 30

Instruction Fetch

Question 31

Defines priorities for interrupt and to allow an interrupt of higher priority to cause a lower-priority interrupt handler to be itself interrupted

Answer 31

nested interrupt processing

Question 32

The prototype of all subsequent general-purpose computers

Answer 32

Von Neumann Machine

Question 33

PCI signal line group that includes 32 lines that are time multiplexed for addresses and data

Answer 33

Address and data pins

Question 34

A popular high-bandwidth processor independent bus that can function as a peripheral bus

Answer 34

Peripheral Component Interconnect

Question 35

Determine the address of the next instruction to be executed

Answer 35

Instruction address calculation

Question 36

Write the result into memory or out to I/O

Answer 36

Operand Store

Question 37

Zero represents a positive number and 1 represents a negative number

Answer 37

Sign of mantissa

Question 38

Contains a word to be stored in memory sent to the I/O unit, or is used to receive a word from memory or from the I/O unit

Answer 38

MBR

Question 39

Agreed upon standard of the computer industry for the storage of floating numbers

Answer 39

IEEE 754

Question 40

Are used to designate the source or destination of the data on the data bus

Answer 40

Address Lines

Question 41

Reads Instructions from the memory location into the processoor

Answer 41

IF

Question 42

Fetcch the operand from memory or read it in from I/O

Answer 42

OF

Question 43

Perform the operation indicated in the struction

Answer 43

OS

Question 44

Analyze instruction to determine type of operation to be performed and operand/s to be used

Answer 44

IAC

Question 45

If the operation invloves reference to an operand in memory or available via I/O, then determine the address of the operand

Answer 45

OAC

Question 46

Determine the address of the next instruction to be executed

Answer 46

DO