8.3 Memory Hierarchy and Caches Flashcards
What does a von Neumann architecture imply about the storage of programs
Stored in memory (potential to cache instructions)
Compare SRAM to DRAM
How does SRAM, DRAM, HDD etc. compare in relation to cost and cycles
How long is a nanosecond
What are the memory tradeoffs
What is a cache
What is the purpose of an instruction cache
- Store frequently used instructions and instruction blocks
Are caches determined by the ISA or micro-architecture?
Micro-architecture (ISA just sees a flat memory space)
What is the cache level hierarchy
L3 is usually shared
What are inclusive / exclusive caches and how are they typically used
How does cache inclusivity work
Replicated, but when evicted stays in high level
What is the memory hierarchy
What is a working set (memory)
What are cache blocks
Set of words transfered at once:
* Little additional cost to transfer additional words.
* Already paid the latency cost for memory access with first word.
* High probability the rest of block will be needed anyway.
What is locality (and types: time, space)
What is temporal locality (memory)
Commonly accessed address => store data
What is spatial locality (memory)
Close data is more often used => cache blocks
What is a cache hit / miss
How does a tag store work
Used to determine what is in cache. Tags are most sig bits, index is the least sig.
What is a direct mapped cache
Use modulo to map RAM to cache. (if conflict remove last)
What is a valid / modify bit (cache)
Valid: true copy. Modify: Need writeback
Least to most sig: Word indexing within block, indexing within cache, tag to check if same.
