3.1 - computer architecture 🏗 Flashcards
what does a modern CPU have inside?
an ALU, CU, and some register buses
who paved the way for CPUs to look like this and why?
John von Neumann - he did this to allow computers to operate with less human intervention through his stored program concept
what does ALU stand for and what are its functions?
ALU = arithmetic + logic unit; it carries functions like logical shifts, subtractions, and logic gate operations while a program’s running on a device
what does CU stand for and what are its functions?
CU = control unit; it reads instructions from the program counter to interpret them through a fetch-decode-execute cycle while also helping keep data flow in a device in sync
how does the CPU access data and programs on a device?
it takes them from backing stores like HDDs and SSDs to temporarily put them into the RAM (aka IAS) to allow for faster R/W ops
what special purpose registers are in a von Neumann-system CPU?
the CIR (current instruction register), ACC (accumulator), MAR (memory address register), MDR (memory data register), and program counter (PC)
what does the CIR do?
it stores the instruction currently being decoded+executed
what does the accumulator do?
it temporarily stores data during ALU calculations
what does the MAR do?
it stores the memory location address being written to
what does the MDR do?
it stores data that’s either already read or about to be written
what does the PC do?
it stores the address of the next instruction to be read
what do device memory partitions contain?
binary addresses that can be written into the MAR to have their contents put into the MDR
what system buses exist in von Neumann architecture?
the address, data, and control buses
what does the address bus do?
it unidirectionally carries addresses from the CPU to device memory and can address more memory locations simultaneously the wider it is
what does the data bus do?
it bidirectionally carries data between the CPU and device memory and can process more bits simultaneously the wider it is
what does the control bus do?
it bidirectionally carries signals between the control unit and other device components and is always 8 bits wide
what’s meant by the “fetch” part of the FDE (fetch-decode-execute) cycle?
it’s when the MDR fetches the next instruction from a currently-stored memory address in the MAR and keeps it with itself so its contents can be copied to the CIR and the PC incremented by 1
what’s meant by the “execute” part of the FDE cycle?
it’s when instructions that’ve already been decoded are passed as control signals by the CPU to the components where they’d be most appropriate
how do system clock speeds affect device performance?
increasing them could potentially make a device work faster as long as they don’t exceed a certain limit beyond which overclocking occurs
what could happen in the event of overclocking?
the device’s CPU could overheat and instructions could also end up being out-of-sync
how does cache memory work?
it stores a set of frequently accessed instructions and data within the CPU itself so they can be accessed more quickly than if they were stored in the device RAM
how does the number of cores in a CPU affect device performance?
increasing that number could potentially reduce the need for clock speed changes but might also be a burden on communication between CPU cores as well
what are ops in a device’s low-level instruction set divided into?
the opcode (informs about the necessities to the CPU) and operand (contains the must-be-acted-on data/memory registers)
what are some examples of device instruction sets?
x86 (32-bit), x64 (64-bit), i386 (32-bit), and Itanium (64-bit)
