1.1.1 Structure & Function of the Processor

Question 1

What is the purpose of the Arithmetic Logic Unit?

Answer 1

Completes all the arithmetical and logical operations

Question 2

What is the purpose of the Control Unit?

Answer 2

Directs operations inside the CPU

Question 3

What are registers?

Answer 3

Small memory cells that operate at high speeds

Question 4

What does the Program Counter store?

Answer 4

The address of the next instruction

Question 5

What does the accumulator store?

Answer 5

Arithmetic & logic results of ALU

Question 6

What does the Memory Address Register store?

Answer 6

The address of the location to be read from or written to

Question 7

What does the Memory Data Register store?

Answer 7

The data read from or to be written to

Question 8

What does the Current Instruction Register store?

Answer 8

The current instruction divided up into opcode & operand

Question 9

What is a bus?

Answer 9

A set of parallel wires connecting two or more components together

Question 10

What is the system bus?

Answer 10

The collection of the data bus, address bus & control bus

Question 11

What is the width of a bus?

Answer 11

The number of parallel wires it has

Question 12

What is the data bus?

Answer 12

A bidirectional bus used to transport data and instructions between components

Question 13

What is the control bus?

Answer 13

A bidirectional bus used to transmit control signals between internal & external components

Question 14

What is the address bus?

Answer 14

A unidirectional bus used to transmit the memory address specifying where data is to be sent to or retrieved from

Question 15

What consequence does adding a wire to the address bus have?

Answer 15

Doubles the number of addressable locations

Question 16

What does Bus Request indicate?

Answer 16

A request from a device for access to the data bus

Question 17

What does Bus Grant indicate?

Answer 17

The CPU has granted access to the data bus

Question 18

What does memory write do?

Answer 18

Causes the data on the data bus to be written into addressed location

Question 19

What does memory read do?

Answer 19

Causes the data from the addressed location to be placed onto the data bus

Question 20

What does the interrupt request control signal indicate?

Answer 20

A device is requesting access to the CPU

Question 21

What is the clock control signal used for?

Answer 21

Synchronise instructions

Question 22

What is assembly language?

Answer 22

Assembly language is a programming language where mnemonics are used to represent instructions

Question 23

What is opcode?

Answer 23

Determines the type of instruction and what hardware is required to execute it

Question 24

What is the operand?

Answer 24

Address of where the operation is performed

Question 25

What occurs during the fetch phase of the FDE cycle?

Answer 25

The address from the PC is copied to the MAR
Instruction held at address copied to MDR by the data bus
Simultaenously the contents of the PC is increased by 1
The value of the MDR is copied to the CIR

Question 26

What occurs during the decode phase?

Answer 26

The contents of the CIR is split into operand & opcode

Question 27

What occurs during the execute phase?

Answer 27

The opcode is executed on the data

Question 28

What is clock speed?

Answer 28

The number of clock cycles completed per second

Question 29

What is cache memory?

Answer 29

A faster smaller segment of memory
Holds frequently used data/instructions
Built into processor so faster access

Question 30

What is pipelining?

Answer 30

The process of completing stages of the FDE cycle simultaneously on numerous data/instructions

Question 31

What is Von Neumann architecture?

Answer 31

CPU architecture with a single shared memory & shared data bus for both data & instructions

Question 32

What is Harvard architecture?

Answer 32

CPU architecture with two separate memory & data buses for data & instructions

Question 33

What is contemporary processing?

Answer 33

Von Neumann architecture is used for main memory
Harvard architecture is used for cache, dividing into instruction cache & data cache