1.1.1 Structure and Function of the Processor Flashcards
What is the Control Unit (CU)?
A component of the CPU which coordinates all its activites
what are the main functions of the CU?
- directs flow of data between CPU and other devices
- sends command control signals on the control bus (eg. requests to read and write to memory)
- coordinates and communicates with other CPU components
What is the Program Counter (PC)?
Register which holds the address of the next instruction to be processed. Increments by one each clock cycle.
What is the Memory Address Register (MAR)?
Register which holds the address of data or an instruction which is to be fetched or that is going to be written to.
what does the MAR use to send addresses?
address bus
what is the Memory Data Register (MDR)?
Register used to temporarily store data that is read from or written to memory.
what does the Current Instruction Register (CIR) do?
holds the current instruction being processed
what is an instruction made up of?
opcode + operand
what does the Arithmetic Logic Unit (ALU) do?
performs logical or arithmetic operations on data
What does the Accumulator (ACC) do?
one of the general purpose registers that stores the result of the ALU temporarily
What does the Address Bus carry?
memory addresses that identify where data is being read from or written to
what does the Control bus carry?
command and control signals to and from every component in the CPU/computer
what does the Data Bus carry?
the binary code (1s and 0s) that make up the information being transmitted around the computer/CPU
how is data processed in a computer?
the computer follows a set of instructions called a computer program
what happens during the fetch stage of the FDE cycle?
- PC checked as it holds address of next instruction
- address in PC is copied to MAR
- address then sent to memory on address bus. it then waits for a signal from control bus
- CU sends signal (eg. read or write) along control bus
- contents in memory sent along data bus to MDR
- as the data is an instruction, data is then copied from MDR to CIR
- Increment the PC for next instruction
what happens during the decode stage of the FDE cycle?
- instruction in the CIR is decoded by the decode unit
- if the instruction uses the ALU, load the contents of the memory address in the ACC
what does the opcode do?
tells the computer what to do
what is the operand?
tells the computer what the opcode instruction should be performed on (eg. actual data or an address)
what happens during the execute stage of the FDE cycle?
which registers are used will depend on instruction:
- If value is being inputted the ACC will store value
- If value is being outputted this will be value currently in ACC
- If value is loaded from RAM this will be sent across the data bus from RAM (in the address location in the MAR) to the MDR
- If a value is to be stored it will take the value from the ACC, send it to MDR then send it across data bus to RAM (to the address location in the MAR)
- If a value is being added to or subtracted from another value, carried out in the ALU
- If the LMC code is to branch the comparison will take place in the ALU
what happens in the decode and execute stages if the program branches?
- if instruction in the opcode says branch, replace value in PC with the operand from the CIR
- carry out the fetch cycle as normal
what is the clock speed?
the number of FDE cycles per second in Hertz (Hz)
how does an increased clock speed increase performance?
a greater number of cycles per second means more instructions can be carried out so the computer runs faster.
what is cache?
temporary storage of data and instructions that is read from or written to.
near the CPU so faster to access
how does a larger cache improve CPU performance?
more instructions can be stored near the CPU
this means the are quicker to access
what does multiple cores on a single chip mean?
a single chip which has more than one processor that can excecute separate instructions.
how do multiple cores improve CPU performance?
more than one instruction can be processed simultaneously so a program can run faster
why does multiple cores not directly increase CPU performance?
- cores have to communicate
- some programs are not designed for multicore processing
what is pipelining?
carrying out instructions concurrently (at the same time)
each instruction is at a different stage of the FDE cycle
what happens to pipelining when there is branching?
the pipeline has to be flushed (some instructions have to be removed)
how does pipelining improve efficiency and processor performance?
- Pipelining reduces latency
- The CPU is not idle while waiting for the next instruction which increases the speed of execution
- The next instruction is fetched while the current one is decoded/executed
- All parts of the processor can be used at any instance in time
what is the structure of the Von Neumann architecture?
- unified memory
- single system bus
- one control unit
- instructions and data stored in same format
what is the structure of the Harvard architecture?
- separate memory for instructions and data
- separate system busses for instructions and data
- separate control units
- reading + writing is done at the same time as fetching instructions
what are some examples of contemporary processor architectures?
- SIMD - used in grahics processors
- MIMD - multiple instructions on multiple data with multiple cores
- distributed computing - multiple computers on shared network working on a bigger problem
