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Computing > 1.1.1 Structure and function of processor (new) > Flashcards

1.1.1 Structure and function of processor (new) Flashcards

1
Q

What does the Arithmetic and Logic unit do?

A

It completes all the arithmetical and logical operations.

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2
Q

What is the Control Unit?

A

A part of the processor which controls and manages the execution of instructions. It sends control signals to coordinate execution and controls FDE cycles and buses.

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3
Q

What are registers?

A

Small memory cells that operate at high speeds. They are used to temporarily store data.

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4
Q

Where do all the arithmetic, logic, or shift operations occur?

A

They occur in registers.

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5
Q

What does the Program Counter (PC) do?

A

Holds the address of the next instruction.

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6
Q

In which part of the CPU do all calculations take place?

A

The Arithmetic and Logic Unit (ALU)

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7
Q

What does the accumulator do?

A

Stores the results from calculations.

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8
Q

What does the Memory ADDRESS Register do?

A

Holds the address of a location that is to be read from or written to.

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9
Q

What does the Memory DATA Register do?

A

Temporarily stores the data that has just been read from or the data needs to be written.

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10
Q

What does the Current Instruction Register do?

A

Holds the current instruction being executed, divided up into opcode and operand

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11
Q

What is a Bus?

A

A set of parallel wires connecting two or more components together inside the CPU.

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12
Q

What are the three buses collectively called?

A

The system bus.

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13
Q

What is the width of a bus?

A

The number of parallel wires it has

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14
Q

What is the data bus?

A

A bidirectional bus used to transport data and instructions between components

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15
Q

What is the control bus?

What does it coordinate the use of?
What does it provide?

A

A bi-directional bus used to transmit CONTROL SIGNALS between internal and external components.

It coordinates the use of address and data buses.
It provides status info between system components.

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16
Q

What is the address bus used for?

A

Used to transmit the memory address specifying where data is to be sent to or retrieved from.

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17
Q

What does adding a wire to the address
bus do to the number of addressable
locations?

A

It doubles the number of addressable locations

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18
Q

Control signal: What does the Bus Request indicate?

A

Indicates a device is requesting access to the data bus.

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19
Q

Control signal: What does Bus Grant indicate?

A

Indicates the CPU has granted access to the data bus.

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20
Q

Control signal: What does memory write do?

A

Causes the data on the data bus to be written into the addressed location

21
Q

Control signal: What does memory read do?

A

Causes the data from the addressed location to be placed onto the data bus.

22
Q

Control signal: What does the interrupt request indicate?

A

Indicates that a device is requesting access to the CPU.

23
Q

Control signal: What is the clock used for?

A

It is used to synchronise operations.

24
Q

What is Assembly Language?

A

A programming language where mnemonics are used to represent instructions.

25
Q

What does the opcode specify?

A

The type of instruction.

26
Q

What is the operand?

A

The address of where the operation is performed

27
Q

What occurs during the fetch phase?

A

The address from the PC is copied to the MAR,

Instruction held at that address is copied to the MDR by the data bus, simultaneously the contents of the PC are increased by 1.

The value held in the MDR is copied to the CIR

28
Q

What occurs during the decode phase?

A

The contents of the CIR are split into operand and opcode.
Opcode checked against decoding unit. CPU will now perform this instruction.

29
Q

What occurs during the execute phase?

A

The opcode is executed on the operand.

30
Q

What is the clock speed?

A

The frequency at which the internal clock generates signals switching between 0 and 1.

31
Q

What is cache?

A

A small and fast but expensive memory onboard the CPU used to store instructions and data that are accessed regularly.

32
Q

What is pipelining?

A

The process of completing the fetch, decode and execute of three separate instructions simultaneously.

While one instruction is being executed, another can be decoded and another fetched.

33
Q

What are features of Von Neumann architecture?

A
  • Shared memory and data bus used for both data and instructions
  • Instructions and data are stored in same format
  • Single control unit follows a linear FDE cycle
  • Includes all the basic components of the processor and computer.
  • 1 instruction at a time
  • Registers are used as fast access to instructions and data
34
Q

What are features of Harvard architecture?

A
  • Two physically separate memories for data and instructions with their own buses
  • Reading and writing data can be done at the same time as fetching an instruction.
  • Used by RISC processors
35
Q

What is contemporary processing?

A

Harvard and Von Neumann combined

Von Neumann
• Used when working with data and instructions in main memory.

Harvard
• Used to divide cache into instruction cache and data cache.

36
Q

What is the width of the bus directly proportional to?

A

The number of bits that can be transferred simultaneously at any given time.

37
Q

Typically, how wide are buses?

A

8, 16, 32 or 64 wires wide.

38
Q

What does clock speed do?

A

It controls how often data is fetched and instructions are executed.

39
Q

What is clock speed determined by?

A

The system clock.

40
Q

Each CPU operation starts as the clock does what?

A

Changes from 0 to 1.

41
Q

What is a core?

A

An independent processing unit that handles instructions with its own FDE cycles.

42
Q

How do multicore processors work?

A

They have multiple cores running simultaneously.

43
Q

What is the problem with multicore CPUs?

A

Some programs aren’t optimised for the use of more than one core.

44
Q

What are advantages of Von Neumann?

A

Cheaper to develop as control unit is easier to design.
Programs can be optimised in size.

45
Q

What are advantages of Harvard?

A

Quicker execution as data and instructions can be fetched in parallel.
Memories can be different sizes, which can make more efficient use of space.

46
Q

Pipelining attempts to solve a problem. What?

A

Reducing the amount of the CPU which is kept idle.

47
Q

Instruction pipelining vs Arithmetic pipelining

A

Instruction: Seperating out the instruction into fetching, decoding and executing.
Arithmetic: Breaking down the arithmetic operations and overlapping them as they are performed.

48
Q

What kind of program may not necessarily benefit from pipelining?

A

One with lots of branching instructions

Computing (31 decks)

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